Jobs in Kuching, Malaysia

As a Senior Analog IC Design Engineer, you will be responsible to design medium to high complexity analog circuits using CMOS/BCD/HV technology. In addition to the design work, you will have the opportunity to take the responsibility of Analog Lead Designer of our new development projects, taking care of the analog design activities while working closely with the other domains in the project (Layout, Mixed‑Signal, Test departments).

• Develop a wide variety of products (integrated sensors, actuators, sensor interfaces) and design a variety of high performance blocks (ADC, supply system, amplifier, IO interface and others);
• Design analog building blocks to meet the customer requirements and integrate them into bigger systems;
• Use industry EDA tools (Cadence, Mentor, or Synopsys) for schematic capture and simulation setup to perform and analyse pre- and post-layout simulations of the designed analog blocks;
• Closely collaborate with the IC Layout Engineers to achieve the optimal design performance vs area;
• Write Verilog-A behavioural models for quick simulation, prototyping and analysis;
• Support the Mixed Signal Design Engineer with top‑level simulations to ensure the correct integration of analog, digital and software components;
• Work together with the Product Verification Engineers to perform lab evaluation and validation of complex IC’s;
• Collaborate with Test Solution Development Engineers to ensure the design to be fully and efficiently tested;
• Lead and participate in design reviews and create the necessary design and product documentation;
• Lead Root Cause and Failure Analysis investigations；
• Work with multi‑disciplinary and international project team members;
• Mentoring of junior Analog Design Engineers;

• Engineering master degree in Electronics, Physics or other related fields.
• Minimum 5 years of relevant industry experience designing analog block designs such as (but not limited to): bandgap voltage references, LDO regulators, amplifiers, VCOs, ADCs.
• Knowledge of CMOS process and device parasitics.
• Experience with various analog circuit design techniques, such as noise analysis, stability analysis, and feedback analysis.
• Hands‑on experience with industry standard EDA tools such as Cadence, Synopsys, Siemens.
• Knowledge of Verilog A/AMS modelling is considered a plus.
• Understanding of simulation models, design rules and verification procedures (DRC/LVS/ERC).
• Familiar with 6‑sigma design practices and good understanding of statistical analysis.
• Excellent written and oral communications skills in English.
• Able to work independently on complex technical and/or engineering tasks.
• Experience in taking up the technical leadership of an IC development project is a plus.
• Flexible to respond to dynamic work and customer needs.
• Team player, passionate about technology, solution driven.
• Self‑motivated and able to take full responsibility for solutions.

• A challenging job in a dynamic high‑tech international environment.
• The opportunity to take ownership of your professional passion in order to contribute to the success of the company.
• An enjoyable, team‑oriented and professional atmosphere in a flat‑structured organisation.
• Versatile development opportunities.