Lead Analog IC Layout Engineer

Krisvconsulting Services Pte Ltd; Penang; On-site; MYR 120,000 - 160,000; Full time

Job summary

A leading consulting firm in Penang is seeking an experienced Lead Analog IC Layout Engineer to spearhead IP/full-chip layout processes. The ideal candidate will have 9-14 years of experience in analog layout, along with proficiency in submicron CMOS techniques and CAD tools such as Cadence Virtuoso and Mentor Calibre. This role requires strong problem-solving skills and effective collaboration across teams.

Qualifications

• 9 -14 years of experience in analog layout.
• Proficient in submicron CMOS layout techniques.
• Strong knowledge of IR drop and EM analysis.

Responsibilities

• Lead or co-lead IP/full-chip layout activities from scratch.
• Perform floor planning, routing, and layout verification.
• Collaborate with cross-functional teams for seamless layout integration.

Skills

Analog layout experience

VLSI exposure

Submicron CMOS layout techniques

IR drop and EM analysis

Cadence Virtuoso

Mentor Calibre

Problem-solving skills

Communication skills

Teamwork

Education

Bachelor's Degree in Electrical/Electronic Engineering or Physics

Tools

Cadence Virtuoso VXL

Mentor Calibre

Job description

About the job Lead Analog IC Layout Engineer

Seeking an experienced Analog Layout Engineer with a Bachelor\'s Degree in Electrical / Electronic Engineering or Physics, to lead and execute IP/full-chip layout from planning to verification, ensuring high-quality and on-time delivery.

Responsibilities

• Lead or co-lead IP/full-chip layout activities from scratch.
• Perform floor planning, routing, and layout verification (LVS, DRC, Antenna checks).
• Collaborate with cross-functional teams for seamless layout integration.
• Conduct internal and external layout design reviews.
• Utilize CAD tools (Cadence Virtuoso VXL, Mentor Calibre) for layout and checks.
• Troubleshoot layout issues and resolve violations efficiently.
• Mentor and guide junior engineers to ensure quality and delivery.
• Drive layout optimization and methodology improvement.

Qualifications / Required Skills

• 9 -14 years of experience in analog layout with VLSI exposure.
• Proficient in submicron CMOS layout techniques.
• Strong knowledge of IR drop and EM analysis.
• Hands-on with Cadence Virtuoso and Mentor Calibre.
• Excellent problem-solving and analytical abilities.
• Effective communicator with initiative and teamwork skills.
• Experience in analog layout from scratch.
• Capable of working across functions and teams.