Senior Staff IP Logic Design / Microarchitect

Reeracoen Recruitment; Bayan Lepas; On-site; MYR 150,000 - 200,000; Full time

Job summary

A leading recruitment agency in Malaysia is seeking a Senior IP Logic Design Engineer responsible for the design and implementation of logic design and microarchitecture. The ideal candidate will drive low power designs to completion, ensure validation against corner cases, and have deep knowledge of Lint and CDC flows. This role offers opportunities for collaboration across teams and requires a strong background in IP design.

Responsibilities

• Define and design Unit Level / Layer Level IP Design for high frequency requirements.
• Drive a low power and complex design to completion.
• Orchestrate the team on validation requirements to catch logic bugs.
• Deep knowledge on Lint and CDC flow required.

Job description

The Senior IP Logic Design Engineer will be responsible for the design and implementation of logic design, microarchitecture definition, RTL coding, IP releases, high speed timing convergence, and collaboration with cross-functional teams to meet project specifications. Tasks also include performance optimization and ensuring design functionality through verification and validation processes.

Key Responsibilities

1. IP Design Responsibility
   • Define and design Unit Level / Layer Level IP Design that able to converge timing at high end process node, with high frequency requirements.
   • Ability to drive a low power and complex design to completions.
2. IP Quality Responsibility
   • Ability to orchestrate the team on validation requirements to catch all possible boundary conditions of logic bugs.
3. IP Releases
   • Deep knowledge on Lint and CDC flow and ability to drive the Lint and CDC convergence.