VLSI CAD/EDA Engineer — RTL & Verification

Lattice Semiconductor; Penang; On-site; MYR 247,000 - 331,000; Full time

Job summary

A leading semiconductor company in Penang, Malaysia, is seeking an experienced CAD/EDA Engineer to contribute to the development of logic design methodologies. The ideal candidate will have 3 to 5 years of EDA experience and a solid understanding of Verilog, with a focus on CDC and logic verification. This role involves collaboration across teams and continuous improvement initiatives in a dynamic environment.

Benefits

Comprehensive compensation and benefits

Opportunities for professional development

Qualifications

• 3 to 5 years of industry EDA experience including logic verification.
• Must demonstrate critical thinking and problem-solving capabilities.
• Detailed understanding of Verilog syntax and RTL styles.

Responsibilities

• Develop and support CDC, linting, and logic verification methodology & flow.
• Create, release, and maintain standard design scripts for EDA tools.
• Document and conduct training on developed methodology and EDA flows.

Skills

Logic verification

Critical thinking

Problem-solving

EDA tool automation

Effective communication

Education

BSEE/CE or MSEE

Tools

Cadence Xcelium

Cadence Jasper Gold

Synopsys Spyglass

Synopsys VCS

Silicon Questa

Job description

A leading semiconductor company in Penang, Malaysia, is seeking an experienced CAD/EDA Engineer to contribute to the development of logic design methodologies. The ideal candidate will have 3 to 5 years of EDA experience and a solid understanding of Verilog, with a focus on CDC and logic verification. This role involves collaboration across teams and continuous improvement initiatives in a dynamic environment.