FPGA Simulation Engineer - HDL Design & Verification

Lattice Semiconductor; Penang; On-site; MYR 90,000 - 120,000; Full time

Job summary

A leading technology company in Malaysia is seeking an experienced HDL design/verification engineer to design and enhance simulation capabilities in their FPGA design tool. The role involves enabling simulation workflows, resolving issues, and validating simulation features. Candidates should possess a degree in Electronics Engineering and have solid experience with HDLs and simulation tools, ideally for over 5 years. Competitive compensation and a collaborative team environment are offered.

Benefits

Competitive compensation

Comprehensive benefits

Technical mentorship

Qualifications

• Solid experience with hardware description languages (HDLs) and simulation tools.
• Strong understanding of HDL simulation concepts.
• Industrial experience in similar field for over 5 years.

Responsibilities

• Design, develop, and enhance simulation capabilities within Lattice Radiant.
• Enable and support simulation workflows across various Lattice FPGA families.
• Assist in diagnosing and resolving simulation issues.
• Validate and test simulation features and debug interfaces.

Skills

Hardware description languages (HDLs)

Simulation tools (e.g., Modelsim, Synopsis VCS)

Analysis and debugging capabilities

Communication and collaboration skills

Education

Bachelor’s or Master’s degree in Electronics Engineering or related field

Job description

A leading technology company in Malaysia is seeking an experienced HDL design/verification engineer to design and enhance simulation capabilities in their FPGA design tool. The role involves enabling simulation workflows, resolving issues, and validating simulation features. Candidates should possess a degree in Electronics Engineering and have solid experience with HDLs and simulation tools, ideally for over 5 years. Competitive compensation and a collaborative team environment are offered.