Principal Engineer & Analog Layout

Talent Trader Group Pte Ltd; Penang; On-site; MYR 200,000 - 250,000; Full time

Job summary

A recruitment agency in Penang is seeking an experienced engineer to lead layout implementations focusing on analog design. Candidates must have a Bachelor’s degree in Electrical / Electronic Engineering and at least 8 years of experience in delivering analog layouts. Proficiency in CAD tools like Cadence Virtuoso and Mentor Calibre is essential. This role requires collaboration with teams and guiding junior engineers to ensure high-quality results. The position offers an opportunity to influence design quality and methodology improvements.

Qualifications

• Bachelor’s degree in Electrical / Electronic Engineering, Physics, or a related VLSI discipline.
• At least 8 years relevant experience in analog layouts.
• Strong analytical skills with a quality-driven mindset.

Responsibilities

• Drive block, IP, and full-chip floor planning and layout implementation.
• Lead physical layout activities in collaboration with teams.
• Perform layout verification for checks like LVS, DRC, and antenna.

Skills

Analog layout design

Submicron CMOS technologies

Collaboration across teams

Problem-solving

Quality-driven mindset

Education

Bachelor’s degree in Electrical / Electronic Engineering

Tools

Cadence Virtuoso (VXL)

Mentor Calibre

Job description

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Drive block, IP, and full-chip floor planning and analog layout implementation from scratch

Lead or co-lead physical layout activities in close collaboration with circuit designers and project stakeholders

Perform and resolve layout verification issues including LVS, DRC, antenna, density, and related checks

Conduct comprehensive internal and external layout design reviews to ensure quality and robustness

Own project planning activities, including schedule definition and task allocation

Leverage advanced CAD tools such as Cadence Virtuoso (VXL) and Mentor Calibre for layout integration and verification

Mentor and guide junior engineers to ensure timely delivery and high layout quality

Drive improvements in layout methodology, productivity, and design quality

Candidate Profile

Bachelor’s degree in Electrical / Electronic Engineering, Physics, or a related VLSI discipline, or equivalent industry experience

At least 8 years relevant experience

Strong track record of delivering analog layouts from scratch in submicron CMOS technologies

Exposure to RF or high-voltage layout is an advantage

Deep understanding of analog layout fundamentals, including matching, parasitics, ESD, and DFM

Strong analytical and problem-solving skills with a quality-driven mindset

Proven ability to collaborate effectively across teams and communicate technical concepts clear

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EA License No: 13C6305

Reg. No.: R1874608 (Lee Jia Hou)

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