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[CONTRACT] UVM Verification Engineer
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[CONTRACT] UVM Verification Engineer
Descrizione del lavoro
A leading technology recruitment company is looking for a UVM Verification Engineer to join their Digital Verification team on a 6-month contract. The position is remote, based in France. Responsibilities include extensive work within a UVM environment on High Speed System-on-Chips. Candidates should possess strong knowledge in UVM verification and experience in ASIC verification, along with skills in SystemVerilog and high-speed interfaces.
Competenze
- Extensive knowledge of UVM verification.
- Experience with SystemVerilog and ASIC verification.
- Familiarity with high-speed interface standards.
Mansioni
- Assist in UVM verification for High Speed System-on-Chips.
- Collaborate within the Digital Verification team.
- Implement automated frameworks for verification tasks.
Conoscenze
Job Title: UVM Verification Engineer
Job Type: Contract
Duration: 6 months' initial
Location: Remote, France
Start: ASAP
We are seeking a UVM Verification Engineer to join the client's Digital Verification team. You will be working extensively within their UVM environment to assist on High Speed System-on-Chips (SoCs).
- Extensive knowledge of UVM verification
- SystemVerilog
- Automated framework implementation
- Extensive experience in ASIC verification
- Knowledge of high speed interfaces, specifically Ethernet or similar
- SoC verification preferred but IP is okay
For more information on the position and the company, please contact us with an updated CV, availability and required rate.
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