Staff Physical Design Engineer

AMD; Bayan Lepas; On-site; MYR 120,000 - 160,000; Full time

Job summary

A leading semiconductor company in Bayan Lepas is seeking an experienced Physical Design Engineer to enhance GPU products. This role involves driving critical design processes from RTL to GDSII, optimizing methodologies for performance, power, and area, and collaborating with distributed teams. Candidates should have 8+ years in high-performance designs, strong analytical and problem-solving skills, and proficiency in scripting with Perl, Tcl, or Python. A Bachelor's or Master's in Electronics/Electrical Engineering or Computer Engineering is required.

Qualifications

• 8+ years of professional experience in physical design, preferably with high-performance designs.
• Strong experience with tools for logic synthesis, place and route, timing analysis.
• Experience in advanced sub 7nm nodes.

Responsibilities

• Own critical GPU units and drive to convergence from RTL-to-GDSII.
• Develop and improve physical design methodologies to optimize PPA.
• Implement floor plan, synthesis, placement, Timing Closure, Routing, Physical Verification.

Skills

Analytical skills

Problem-solving abilities

Communication skills

Education

Bachelor's or Master's in Electronics/Electrical Engineering, Computer Engineering

Tools

Perl

Tcl

Python

Job description

Overview

We are looking for an adaptive, self-motivated physical design engineer to join our team. As a key contributor, you will be part of an engineering team to drive and improve AMD's abilities to deliver the MI/Navi series of GPU products to market. The Physical Design Engineering team, as part of GE SoC team, furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON:

Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities.

KEY RESPONSIBILITIES:

• Own critical GPU units and drive to convergence from RTL-to-GDSII - synthesis, floor-planning, place and route, timing closure, and signoff
• Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure.
• Develop and improve physical design methodologies and customize recipes across various implementation steps to optimize PPA.
• Implement floor plan, synthesis, placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff.

PREFERRED EXPERIENCE:

• 8+ years of professional experience in physical design, preferably with high-performance designs.
• Must have closed high-performance IPs -CPU/GPU/DPU/memory controller, etc.
• Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality; familiarity with tools for schematics, layout, and circuit/logic simulation
• Versatility with scripts to automate design flow - Perl/Tcl/Python
• Strong communication skills, ability to multi-task across projects, and work with geographically spread-out teams
• Experience in advanced sub 7nm nodes
• Excellent physical design and timing background.
• A good understanding of computer architecture is preferred.
• Strong analytical/problem-solving skills and pronounced attention to detail.
• Must be using AI technologies in day-to-day problem solving

ACADEMIC CREDENTIALS:

Qualification: Bachelors or Masters in Electronics/Electrical Engineering, Computer Engineering