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Lead Mixed Signal Design Verification Engineer
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Lead Mixed Signal Design Verification Engineer
Job summary
A leading technology company in the United Kingdom is seeking a Lead Mixed Signal Design Verification Engineer to develop and verify analog design behavioral models using System Verilog. The ideal candidate will interact closely with the analog design team and manage DMS and AMS testplans, ensuring high-quality verification of designs. This position offers a very attractive rate for candidates with relevant experience.
Qualifications
- Experience with developing behavioral models of analog design in System Verilog.
- Ability to debug testcases and models effectively.
Responsibilities
- Interact with analog design team to develop behavioral models.
- Integrate SV models in top level verification environment.
- Run AMS testcases and review waveforms.
Skills
Salary: Very Attractive Rate
Location: N/A
Lead Mixed Signal Verification Engineer
- Interact with analog design team and develop behavioral models of analog design blocks in System Verilog
- Integrate the SV behavioral models in top level verification environment; provide debug support for models as and when needed
- Do periodic DMS netlist generation
- Contribute to the DMS testplan --- add description of testcases for verifying A-D connectivity
- Develop checks in the form of System Verilog assertions
- Develop DMS testcases and debug them in case of test failures
- Develop AMS simulation environment
- Develop AMS testplan – capture what all testcases make sense for AMS simulations
- Run AMS testcases and review waveforms with analog design team
* The salary benchmark is based on the target salaries of market leaders in their relevant sectors. It is intended to serve as a guide to help Premium Members assess open positions and to help in salary negotiations. The salary benchmark is not provided directly by the company, which could be significantly higher or lower.