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Principal Digital Verification Engineer

NXP Semiconductors

Brescia

In loco

EUR 60.000 - 80.000

Tempo pieno

Oggi
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Descrizione del lavoro

A leading semiconductor company is hiring a Principal Digital Verification Engineer in Brescia, Italy. This role involves leading pre-silicon verification of complex IP blocks focusing on automotive and industrial applications, especially electrification. Responsibilities include defining verification plans, developing testbenches in UVM/SystemVerilog, and mentoring a team. Ideal candidates will have hands-on experience with EDA tools and knowledge of protocols like SPI and I2C. Competitive salary and benefits offered.

Competenze

  • Experience in pre-silicon verification of complex IP blocks for automotive and industrial applications.
  • Ability to define and execute comprehensive verification plans.
  • Strong knowledge of UVM/SystemVerilog for testbench development.

Mansioni

  • Lead pre-silicon verification of complex IP blocks and SoCs.
  • Create and manage test cases, monitors, and coverage metrics.
  • Coordinate a team of verification engineers, providing technical guidance.

Conoscenze

Hands-on experience with EDA tools
Knowledge of standard protocols
Hands-on experience with Python
Familiarity with automotive and industrial domains

Strumenti

Cadence Xcelium
JasperGold
VManager
Descrizione del lavoro
Role Overview

As a Principal Digital Verification Engineer, you will lead the pre-silicon verification of complex IP blocks, subsystems, or SoCs for automotive and industrial applications, with a strong focus on electrification solutions. In addition to defining verification strategies and developing advanced test environments, you will coordinate and mentor a team of verification engineers, ensuring alignment with project goals and best practices.

Key Responsibilities
  • Define and execute comprehensive verification plans aligned with design specifications and industry standards.
  • Develop, maintain, and debug UVM / SystemVerilog-based testbenches for RTL, gate-level, and power-aware simulations.
  • Create and manage test cases, assertions (SVA / PSL), monitors, and coverage metrics (code and functional).
  • Lead and coordinate a team of verification engineers, providing technical guidance, task planning, and performance feedback.
  • Drive methodology improvements and adoption of best practices, including formal verification techniques and automatic code and report generation.
  • Collaborate cross-functionally with hardware, firmware, and system architecture teams to ensure design quality and integration.
  • Support post-silicon validation and debug, correlating RTL and silicon behavior.
Preferred Skills
  • Familiarity with automotive and industrial domains, especially electrification systems.
  • Hands-on experience with EDA tools (Cadence Xcelium, JasperGold, VManager).
  • Knowledge of standard protocols (SPI, I2C, UART, APB).
  • Hands-on experience with Python, Makefile, Tcl, shell languages.
  • Continuous learning mindset and ability to drive innovation in verification methodologies.
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