Senior Digital Verification Engineer

TechTeamz; A distancia; EUR 40.000 - 60.000; Jornada completa

Descripción de la vacante

Una empresa tecnológica líder busca un Ingeniero de Verificación Digital para unirse a su equipo. Este rol se centra en la verificación funcional a nivel RTL de diseños SoC de próxima generación. Buscamos ingenieros senior con experiencia en verificación funcional, protocoles de interfaces y depuración de problemas complejos. La posición es remota desde España o desde un equipo en El Cairo, ofreciendo una oportunidad de empleo permanente.

Formación

• Fuerte experiencia en verificación funcional a nivel RTL.
• Conocimientos sólidos en protocolos de interfaces como PCIe y AXI.
• Experiencia verificando microcontroladores integrados como RISC-V o ARC.

Responsabilidades

• Desarrollar y ejecutar planes de verificación funcional para subsistemas SoC complejos.
• Supervisar actividades de verificación a lo largo del ciclo de desarrollo.
• Crear y mantener entornos de verificación y casos de prueba.

Conocimientos

Verificación funcional a nivel RTL

Experiencia con SystemVerilog

Conocimientos de protocolos de interfaces de alta y baja velocidad

Capacidad para depurar problemas complejos de diseño

Herramientas

UVM

Assertions (SVA)

Descripción del empleo

Digital Verification Engineer (Functional Verification)

Lea atentamente toda la información sobre esta oportunidad y luego utilice el botón de solicitud de abajo para enviar su CV y su candidatura.

We are seeking a highly skilled Digital Verification Engineer to join our team and contribute to the follow-up and oversight of the development and validation of next-generation SoC designs. This role is focused on functional verification at the RTL level, ensuring design correctness and compliance across complex high-speed and low-speed interfaces. It will involve little coding, so we are looking for Senior Engineers to oversee the activities and review coding.

This will be for a permanent employment opportunity with full remote working conditions based anywhere in Spain, OR for a remote team based in Cairo.

Key Responsibilities

• Develop and execute functional verification plans for complex SoC subsystems.
• Follow up on and oversee verification activities throughout the development lifecycle.
• Create and maintain verification environments, testbenches, and test cases.
• Verify high-speed and low-speed interfaces (e.g., PCIe, Ethernet, DDR, AXI, I2C, SPI, UART, etc.).
• Analyze functional coverage, identify gaps, and drive closure.
• Debug simulation failures and work with design teams to resolve issues.
• Verify low-speed control/debug interfaces including SPI, JTAG, and SMBus.
• Validate integration of embedded microcontroller cores (ARC32 or RISC-V).
• Verify AXI-based system interconnects and bus protocols.
• Track functional and code coverage, driving verification closure.
• Collaborate closely with design and architecture teams to root-cause issues and ensure robust RTL sign-off.

Required Skills & Experience

• Solid background in Front-End (RTL-level) Functional Verification.
• Hands‑on experience with SystemVerilog, UVM, assertions (SVA), and coverage-driven verification.
• Familiarity with protocol verification IP (VIP) for PCIe, CXL, AXI, or equivalent.
• Strong knowledge of high-speed and low-speed interface protocols.
• Experience verifying embedded processors or microcontrollers (RISC‑V, ARC, or similar).
• Proven ability to debug complex design / verification issues.

Nice to Have

• Experience with performance verification and system-level test scenarios.
• Knowledge of verification acceleration/emulation flows. xcskxlj
• Familiarity with formal verification techniques.