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A leading AI solutions provider is seeking software engineers to enhance generative AI models. You will evaluate and improve AI-generated code, engaging with advanced tools in a flexible work environment. A minimum of 3 years in software development and proficiency in Verilog are essential. You will contribute towards shaping the future of AI technology. This position offers long-term opportunities and a competitive hourly pay rate, reflecting your location and experience.
Loom Video
You'll join an expert annotation team to create training data for the world's most advanced AI models.
No previous AI experience is necessary.
You'll get your foot in the door with one of the most prominent players in the AI/LLM space today.
We seek software engineers with 3+ years of experience to train large AI language models, helping cutting‑edge generative AI models write better code.
Projects typically include discrete, highly variable problems that involve engaging with these models as they learn to code.
We currently have 200+ roles open!
Compensation rates vary based on location and experience.
To view the complete list of locations and their values, click here.
Expectations are 15+ hours per week; however, there is no upper limit.
We have engineers working hours per week and some working 40+ hours per week.
You can work as much as you want to.
You will be paid weekly per hour of work done on the platform.
We hope you will commit to 12 months of work, but if you start and it's not a fit for you, we totally understand.
They expect to have work for the next 2 years.
Instead of tracking your hours, you are paid according to time spent on the platform, calculated in the coding exercises.
This will be your final interview, which will ultimately determine your employment and leveling.
Successful completion of this process provides you with an opportunity to work on projects as they become available.
The current priority for this team is engineers with either a Data Science background who know Verilog well or software engineers who are well versed in Verilog.