Analog IC Design Lead - SerDes

IC Resources; Lodi; Remoto; EUR 80.000 - 120.000; Tempo pieno

Descrizione del lavoro

A leading technology company in Italy is seeking an Analog IC Design Lead to oversee the SerDes analog and mixed-signal design strategy. This senior leadership role allows for fully remote work and requires extensive experience in FINFET SerDes design. You will mentor engineers and guide product launches, ensuring high-performance standards. Exceptional communication and leadership skills are essential. If you're a proficient engineer ready for a challenge, get in touch with us.

Competenze

• 15+ years of industry experience in SerDes applications.
• Proven track record in FINFET SerDes design.
• Ability to lead and mentor engineering teams.

Mansioni

• Take ownership of SerDes analog and mixed-signal design strategy.
• Define and drive SerDes architecture.
• Establish verification strategies for performance targets.

Conoscenze

Leadership in analog and mixed-signal design

High-speed circuit design

Signal integrity expertise

Power integrity expertise

Communication skills

Formazione

Bachelor’s or Master’s in Electrical Engineering

Strumenti

EDA tools

Descrizione del lavoro

Overview

I am recruiting for an innovative and fast-growing technology company developing next-generation solutions for high-performance data communication. This is a senior leadership role with the flexibility of fully remote working.

Responsibilities

• As an Analog IC Design Lead, you will take ownership of the full SerDes analog and mixed-signal design strategy, guiding technical direction, mentoring engineers, and ensuring delivery of industry-leading performance.
• You will shape the architecture, influence design methodologies, and play a pivotal role in the successful release of complex products in advanced CMOS FinFET technologies.
• Provide technical leadership for the design of key SerDes IP.
• Oversee and be involved in the development of core analog building blocks.
• Define and drive SerDes architecture in collaboration with system architects and other functional teams.
• Establish robust verification and sign-off strategies to meet aggressive performance and reliability targets.
• Lead and mentor engineering teams, fostering best practices in design, simulation, and layout.
• Support silicon bring-up, validation and characterisation, providing direction through to product launch.

Qualifications

• Bachelor’s or Master’s in Electrical Engineering or related discipline, with 15+ years’ industry experience.
• Proven leadership in analog and mixed-signal design for SerDes applications.
• Strong expertise in high-speed circuit design, signal integrity, and power integrity.
• Proficiency with EDA tools.
• Exceptional communication and decision-making skills, with the ability to lead in a fast-paced, collaborative environment.

If you are an experienced engineer with a track record in FINFET SerDes design, get in touch with Parm Shergill.