Senior Digital Verification Architect for SoCs & Power ICs

Allegro MicroSystems; Greater London; On-site; GBP 50,000 - 70,000; Full time

Job summary

A semiconductor company is seeking a Digital Verification Engineer to join their Design Centre in Edinburgh. In this critical position, you will develop verification plans, maintain verification environments, and analyze results to enhance test coverage of innovative gate-driver ICs. Candidates should have a Bachelor's degree in Electrical Engineering and be familiar with System Verilog, UVM, and mixed-signal verification methodologies. This role offers an opportunity to contribute to advanced power control ICs at a respected firm operating globally.

Qualifications

• Bachelors degree in Electrical and/or Electronic Engineering or equivalent.
• Knowledge of embedded SoC design and verification life-cycle.
• Experience defining functional coverage conditions from microarchitecture specifications.

Responsibilities

• Develop comprehensive verification plans based on microarchitecture specifications.
• Create and maintain SystemVerilog/UVM verification environments.
• Analyze test results and enhance test coverage.

Skills

System Verilog

UVM

Verilog

C/C++

Python

TCL/TK

Debugging

Test coverage analysis

Education

Bachelor's degree in Electrical and/or Electronic Engineering

Tools

SystemVerilog/UVM

Verilog-AMS

Verilog-A

Job description

A semiconductor company is seeking a Digital Verification Engineer to join their Design Centre in Edinburgh. In this critical position, you will develop verification plans, maintain verification environments, and analyze results to enhance test coverage of innovative gate-driver ICs. Candidates should have a Bachelor's degree in Electrical Engineering and be familiar with System Verilog, UVM, and mixed-signal verification methodologies. This role offers an opportunity to contribute to advanced power control ICs at a respected firm operating globally.