Senior RISC‑V Digital IC Verification Engineer

ic resources; Madrid; Presencial; EUR 50.000 - 70.000; Jornada completa

Descripción de la vacante

A leading semiconductor recruitment agency is seeking a digital verification engineer to work on cutting-edge RISC-V technology in Madrid. The ideal candidate will have 5+ years of experience, a Masters or PhD in Electronics, and expertise in UVM environments, ASIC design, and System Verilog. Responsibilities include contributing to advanced technology nodes and managing ASIC verification environments. Visa sponsorship may be available depending on qualifications.

Formación

• 5+ years of experience in digital verification engineering.
• Experience with ASIC / FPGA design and verification.
• Strong understanding of digital ICs / ASIC IP.

Responsabilidades

• Contribute to the development of advanced technology nodes.
• Set up and manage ASIC verification environment.
• Develop digital test plans and create test benches.

Conocimientos

UVM environments

ASIC/FPGA development

System Verilog

Scripting / coding skills (C/C++, Python)

Verification Metrics definition

Educación

Masters or PhD in Electronics / Microelectronics

Herramientas

vManager

vPlan

Descripción del empleo

A leading semiconductor recruitment agency is seeking a digital verification engineer to work on cutting-edge RISC-V technology in Madrid. The ideal candidate will have 5+ years of experience, a Masters or PhD in Electronics, and expertise in UVM environments, ASIC design, and System Verilog. Responsibilities include contributing to advanced technology nodes and managing ASIC verification environments. Visa sponsorship may be available depending on qualifications.