Senior Design Verification Engineer

TechTeamz; A distancia; EUR 30.000 - 50.000; Jornada completa

Descripción de la vacante

A leading tech company is seeking a Design Verification Manager to lead a remote team focusing on silicon design verification. The candidate will define verification strategies, mentor engineers, and drive quality improvements. Required skills include strong expertise in silicon design methodologies, proficiency in UVM and SystemVerilog, and experience in managing remote teams. This role offers the chance to work on cutting-edge open-source silicon technology and collaborate with cross-functional teams globally.

Formación

• Strong expertise in silicon design and verification methodologies required.
• Experience with UVM, SystemVerilog, and formal verification is essential.
• Proficient in Python scripting and automation for verification processes.
• Ability to manage remote, multi-site teams in a collaborative environment.

Responsabilidades

• Mentor and lead a team of design verification engineers across multiple sites.
• Define the overall verification strategy and execution plan for complex projects.
• Drive adoption and improvement of verification methodologies to enhance quality.
• Provide technical guidance for verification projects aligned with architectural goals.
• Collaborate with cross-functional teams to ensure functional excellence.

Conocimientos

Silicon design expertise

Verification methodologies

UVM

SystemVerilog

Formal verification

Constrained-random verification

Coverage-driven verification

Python scripting

Team management

Descripción del empleo

We have an upcoming permanent role for remote work (remote team-management experience required). They develop production-grade open-source silicon, including Root-of-Trust chips and RISC-V cores.

The Design Verification Manager will lead a multi-site DV team, own verification strategy, and drive methodology and quality improvements toward tape-out.

Key Responsibilities

• Team Leadership: Mentor, manage, and develop a team of design verification engineers, including hiring, performance reviews, and resource allocation. The team will be split over multiple sites in different time zones.
• Verification Strategy: Define and own the overall verification strategy and execution plan for complex digital blocks and full-chip verification.
• Methodology Ownership: Drive the adoption, maintenance, and continuous improvement of all verification methodologies and flows to increase efficiency, effectiveness and product quality.
• Technical Guidance: Provide technical direction for verification projects, ensuring alignment with architectural goals and project timelines.
• Cross-functional Collaboration: Work closely with design engineers, architects, and other teams to ensure functional excellence and a smooth verification process, striving to both find bugs and avoid bugs through joined up design and design verification best practices.
• Risk Management: Identify verification deficiencies and measure progress towards tape-out.

Required Skills

• Strong expertise in silicon design and verification methodologies
• UVM, SystemVerilog, and formal verification
• Constrained-random and coverage-driven verification
• Python scripting and automation
• Experience managing remote, multi-site teams

If interested, please share your CV in English.