Physical Verification Engineer – CAD Domain (IC Design)

North American Production Sharing de México, S.A. de C.V.; Tijuana; Presencial; MXN 542,000 - 905,000; Jornada completa

Descripción de la vacante

A leading manufacturing support company in Mexico is seeking a Physical Verification Engineer to ensure the manufacturability and electrical integrity of advanced IC layouts. The ideal candidate will have over 2 years of experience in physical verification and hands-on expertise with EDA tools such as Calibre and ICV. This role involves performing critical design rule checks, executing parasitic extraction, and collaborating with design teams to optimize flows. Join us in shaping the future of semiconductor design!

Formación

• 2+ years of experience in physical verification.
• Hands-on experience with EDA tools like Calibre or ICV.
• Knowledge of layout design and circuit schematics.

Responsabilidades

• Perform DRC/LVS checks to ensure design rule compliance.
• Execute parasitic extraction for accurate circuit simulation.
• Collaborate with teams to resolve verification issues.

Conocimientos

Physical verification expertise

Problem-solving skills

Debugging skills

Herramientas

Calibre

ICV

Descripción del empleo

North American Production Sharing (NAPS) specializes in supporting international and U.S. manufacturing operations expand into Mexico. Known for its expertise, NAPS has established a strong reputation as a leading provider of compliance management and operational support services. The organization facilitates seamless establishment of manufacturing operations across various regions in Mexico, delivering tailored solutions and robust support for its clients.

Role Description

We are looking for aPhysical Verification Engineerwith expertise inphysical verification and parasitic extractionwithin theCAD domain. This role is critical to ensuring manufacturability and electrical integrity of advanced IC layouts.

Key Responsibilities

• PerformDRC/LVS checksto validate design rule compliance and layout vs schematic consistency.
• Executeparasitic extractionto identify and model resistance/capacitance effects for accurate circuit simulation.
• Work with industry-leading EDA tools such asSiemens CalibreandSynopsys ICV.
• Collaborate with design teams to resolve verification issues and optimize flows.

Must-Have Skills

• 2+ years of experiencein physical verification.
• Hands-on experience withCalibre, ICV, or similar tools.
• Knowledge oflayout design, circuit schematics, and CAD flows.
• Strong problem-solving and debugging skills.

Apply Nowand be part of a team shaping the future of semiconductor design!