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ASIC DRAM PHY designer

North American Production Sharing de México, S.A. de C.V.

Tijuana

Presencial

MXN 1,412,000 - 1,766,000

Jornada completa

Hoy
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Descripción de la vacante

A technology company in Tijuana is seeking a highly skilled engineer to develop advanced 2.5D/3D chiplet technologies and networking solutions. Responsibilities include defining next-generation SoC architectures and driving innovation to implement AI use cases. Candidates should have at least 5 years of experience in relevant fields with a strong understanding of chip architecture and system analysis. This role demands both teamwork and independent work capabilities while tackling complex processing challenges.

Formación

  • Excellent understanding of KPI dependencies on architecture.
  • Good knowledge of 2.5D/3D integration schemes.
  • Ability to model integration impacts in Python.

Conocimientos

AI use case KPI dependency
Heterogeneous architecture
Basic programming skills
Advanced data analysis skills

Educación

Bachelor’s degree in Science, Engineering, or related field
Master’s degree in Science, Engineering, or related field
PhD in Science, Engineering, or related field
Descripción del empleo

We are seeking a highly skilled engineer to develop 2.5D/3D chiplet and networking solution-based technology systems co‑optimized for a unique era of heterogeneous compute as Moore’s law slows down. He/she should be able to apply that knowledge to define the company’s next generation SoC and platform architectures including partitions for logic and memories and involving 2.5D/3D chiplets and networking technologies to connect them.

Candidate will also drive innovation in the group to effectively map emerging AI and other compute use cases to process and chip‑integration solutions with detailed knowledge of process technology, 2.5D/3D chiplet architecture, networking technologies, and trade‑offs. Knowledge of different IPs e.g., CPU, GPU, NPU and how they act together to drive an E2E use case is a plus. Candidate will work with internal architecture and system teams to develop 2.5D/3D partitions and map to 3D stacking topologies. Candidate will perform system KPI analysis to drive 3D architecture and stacking strategies for new product introduction.

Technical Minimum Qualifications
  • Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving chiplets and networking technologies.
  • Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes.
  • Basic programming skills e.g., ability to model in Python or other languages the system use case impact of 3D architectures and integration schemes.
  • Master’s in Electrical Engineering, Computer Science, or a related field.
  • Ability to work without much supervision and as part of a team.
  • Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach.
  • Advanced data analysis and interpretation skills are required.
Education & Experience
  • Bachelor’s degree in Science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience.
  • OR Master’s degree in Science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience.
  • OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.
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