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Jobs in Roma, Italy

Analog IC Design Lead - SerDes

JR Italy

Roma
On-site
EUR 90,000 - 120,000
30+ days ago
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Avvocato | Area recupero crediti

JR Italy

Roma
On-site
EUR 30,000 - 50,000
30+ days ago

Sales Leader

JR Italy

Roma
On-site
EUR 60,000 - 90,000
30+ days ago

Responsabile Qualità, Sicurezza, Ambiente - Settore Construction

JR Italy

Roma
On-site
EUR 30,000 - 45,000
30+ days ago

ADMINISTRATIVE SPECIALIST

JR Italy

Roma
On-site
EUR 50,000 - 70,000
30+ days ago
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C++ Software Engineer

JR Italy

Roma
On-site
EUR 35,000 - 50,000
30+ days ago

Compliance Analyst

Worldline

Roma
On-site
EUR 40,000 - 60,000
30+ days ago

Business Energy Consultant

JR Italy

Roma
On-site
EUR 50,000 - 70,000
30+ days ago
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CYS - Service Manager - GCAP

Leonardo

Roma
On-site
EUR 45,000 - 70,000
30+ days ago

Consulente TELEFONISTA

Bonito Casa

Roma
On-site
EUR 25,000 - 35,000
30+ days ago

Network Virtualization Engineer

JR Italy

Roma
On-site
EUR 35,000 - 50,000
30+ days ago

CLINIC MANAGER futuro DIRETTORE DI CLINICA

JR Italy

Roma
On-site
EUR 30,000 - 45,000
30+ days ago

Compliance Analyst

SIX Payment Services

Roma
Hybrid
EUR 45,000 - 65,000
30+ days ago

ADDETTO AL MAGAZZINO - PART-TIME-FIUMICINO

JR Italy

Roma
On-site
EUR 10,000 - 30,000
30+ days ago

Commerciale Operativo

JR Italy

Roma
On-site
EUR 10,000 - 30,000
30+ days ago

Sales Account Software

JR Italy

Roma
On-site
EUR 30,000 - 50,000
30+ days ago

BESS Sales Manager

JR Italy

Roma
On-site
EUR 40,000 - 60,000
30+ days ago

KYC Compliance Analyst

Corpay

Roma
On-site
EUR 50,000 - 70,000
30+ days ago

CYS _Project Manager_DGB

Leonardo

Roma
On-site
EUR 40,000 - 60,000
30+ days ago

Fullstack Developer

Present S.p.A.

Roma
On-site
EUR 35,000 - 55,000
30+ days ago

ODONTOIATRI PER DOCENZE

Qualifica Group Formazione e Lavoro SRL

Roma
On-site
EUR 70,000 - 90,000
30+ days ago

Progettista elettrico - RAILWAY

JR Italy

Roma
On-site
EUR 30,000 - 45,000
30+ days ago

System Engineer Difesa

Capgemini

Roma
On-site
EUR 35,000 - 55,000
30+ days ago

CYS_System Engineer_DGB

Leonardo

Roma
On-site
EUR 35,000 - 50,000
30+ days ago

Consulente Finanziario ING - Veneto, Friuli

JR Italy

Roma
On-site
EUR 50,000 - 70,000
30+ days ago

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Analog IC Design Lead - SerDes
JR Italy
Roma
On-site
EUR 90,000 - 120,000
Full time
30+ days ago

Job summary

An innovative technology company is seeking an experienced Analog IC Design Lead to oversee SerDes analog design strategies. This role offers the flexibility of fully remote work. The ideal candidate will have 15+ years in analog design with leadership experience, strong expertise in high-speed circuit design, and proficiency with EDA tools. You will guide engineers and help launch complex products in advanced technologies.

Qualifications

  • 15+ years’ industry experience in SerDes design.
  • Proven leadership in analog design.
  • Ability to lead in a fast-paced environment.

Responsibilities

  • Provide technical leadership for SerDes IP design.
  • Oversee analog building blocks development.
  • Define SerDes architecture in collaboration with teams.
  • Establish verification strategies for performance targets.
  • Mentor engineering teams in design best practices.
  • Support silicon bring-up and product launch.

Skills

Leadership in analog and mixed-signal design
High-speed circuit design
Signal integrity
Power integrity
Proficiency with EDA tools
Exceptional communication skills

Education

Bachelor’s or Master’s in Electrical Engineering

Tools

EDA tools
Job description

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I am recruiting for an innovative and fast-growing technology company developing next-generation solutions for high-performance data communication. This is a senior leadership role with the flexibility of fully remote working.

As an Analog IC Design Lead, you will take ownership of the full SerDes analog and mixed-signal design strategy, guiding technical direction, mentoring engineers, and ensuring delivery of industry-leading performance. You will shape the architecture, influence design methodologies, and play a pivotal role in the successful release of complex products in advanced CMOS FinFET technologies.

Key Responsibilities

  • Provide technical leadership for the design of key SerDes IP
  • Oversee and be involved in the development of core analog building blocks
  • Define and drive SerDes architecture in collaboration with system architects and other functional teams
  • Establish robust verification and sign-off strategies to meet aggressive performance and reliability targets
  • Lead and mentor engineering teams, fostering best practices in design, simulation, and layout
  • Support silicon bring-up, validation and characterisation, providing direction through to product launch

Requirements

  • Bachelor’s or Master’s in Electrical Engineering or related discipline, with 15+ years’ industry experience
  • Proven leadership in analog and mixed-signal design for SerDes applications
  • Strong expertise in high-speed circuit design, signal integrity, and power integrity
  • Proficiency with EDA tools
  • Exceptional communication and decision-making skills, with the ability to lead in a fast-paced, collaborative environment

If you are an experienced engineer with a track record in FINFET SerDes design, get in touch with Parm Shergill.

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* The salary benchmark is based on the target salaries of market leaders in their relevant sectors. It is intended to serve as a guide to help Premium Members assess open positions and to help in salary negotiations. The salary benchmark is not provided directly by the company, which could be significantly higher or lower.

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