Principal Analog Design Engineer

Philips Recruiting Services; Cascina Vignazza; In loco; EUR 85.000 - 110.000; Tempo pieno

Descrizione del lavoro

A leading technology company is seeking a Principal Analog Design Engineer in Pavia, Italy. The role involves designing high-speed and optical transceivers, requiring a Master’s or Ph.D. in Electrical Engineering and 12-15 years of experience in IC design. Proficiency in both Italian and English is essential. The position offers a competitive salary of €85,000 to €110,000 plus bonuses and paid relocation.

Servizi

Bonus

Signing bonus

Paid relocation

Competenze

• 12-15 years of professional experience in analog design.
• Experience designing ICs from architecture to production.
• Proficiency in both Italian and English (minimum B2).

Mansioni

• Analyze specifications and design transistor-level circuits.
• Model and validate circuit blocks while overseeing layout activities.
• Collaborate with engineering teams and mentor junior staff.
• Manage tasks from pre-silicon simulations to post-silicon characterization.

Conoscenze

Analog design

Circuit modeling and validation

Project management

Collaboration and leadership

Communication skills

Formazione

Master’s degree or Ph.D. in Electrical Engineering

Strumenti

EDA CAD tools

Descrizione del lavoro

Overview

Principal Analog Design Engineer – Pavia, Italy

€85,000 to €110,000 + Bonus + SIGNING BONUS + Paid Relocation

This role is a key position within our Optical PHY (CE-OPHY) team, which is part of our Central Engineering division. Our team is at the forefront of designing high-speed and optical transceivers for modern communication infrastructure. This technology is critical for addressing the explosive demand for bandwidth in mega data centers that power social media, video-on-demand, gaming, and other real-time data streams. We are dedicated to developing innovative, first-to-market chips and subsystem solutions that push the boundaries of data rates and power efficiency.

Responsibilities

• Design & Architecture: Analyze and interpret block specifications, taking ownership of transistor-level design and selecting the most appropriate topologies. Design entire analog macros or IPs from initial concept to final mass production.
• Verification & Validation: Model and validate circuit blocks. Supervise and guide layout activities, provide guidelines, and conduct post-layout verifications to ensure design integrity.
• Collaboration & Leadership: Collaborate with other engineering teams to enhance solutions and participate in cross-functional meetings. Train and mentor junior designers to build the team's technical strength.
• Project Management: Manage pre-silicon tasks (simulation, modeling) and post-silicon tasks (lab characterization, debugging, correlating measurements to simulations) through to high-volume production.

Qualifications

• Education & Experience: Master’s degree or Ph.D. in Electrical Engineering or a related field; 12-15 years of professional experience.
• Technical Skills: Proven experience designing ICs from architecture through lab characterization and volume production. Solid experience in analog design, preferably in the multi-GHz range. Proficiency supervising custom analog layout, using standard EDA CAD tools, and debugging designs to correlate simulations with measurements.
• Preferred Qualifications: Experience with multi-Gbps electrical SerDes or electro-optical transceivers. Knowledge of advanced CMOS nodes, including FinFET, is advantageous.
• Personal Skills: Strong communication, presentation, and documentation skills. Proficiency in Italian and English (minimum B2) with international team experience.
• Work Model: On-site, full-time position located in Pavia, Italy.