Senior Verification Engineer

Synopsys, Inc.; Brackley; On-site; GBP 80,000 - 100,000; Full time

Job summary

A leading technology company in the UK is searching for a hands-on technical leader to drive innovations in mixed-signal verification and ASIC development. The role involves implementing sophisticated test plans, collaborating with product stakeholders, and mentoring team members to ensure quality and efficiency in product delivery. The ideal candidate has over 10 years of experience in ASIC and verification environments, as well as strong skills in automation scripting. A commitment to continuous learning and innovation is essential in this dynamic environment.

Benefits

Comprehensive health benefits

Financial wellness programs

Inclusive work culture

Qualifications

• 10+ years of experience in ASIC development and mixed-signal verification.
• Proficiency in PCIe, Ethernet protocols, and digital signal processing.
• Strong organizational and communication skills with a proven record of delivering solutions under tight deadlines.

Responsibilities

• Implement Unified Test Plans for HPC DSP‑based SERDES PHY products.
• Build and maintain robust verification environments using UVM and SystemVerilog.
• Develop and share automation scripts for design, verification, and testing.

Skills

Mixed-signal verification

ASIC development

High-speed protocols expertise

Automation scripting (Shell, Perl, Python, C++)

Tools

SystemVerilog

UVM methodology

Job description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a hands‑on technical leader with extensive experience in mixed‑signal verification and ASIC development. You excel at implementing sophisticated test plans and sharing best practices with project owners to ensure seamless execution. Your expertise in high‑speed protocols, verification environments, and automation scripting positions you to drive successful product delivery and technical excellence. You are passionate about leveraging your skills to mentor others, optimize workflows, and contribute to a culture of innovation and collaboration. Your approach is both solution‑oriented and inclusive, ensuring every team member has the opportunity to contribute and grow.

What You’ll Be Doing:

• Implementing Unified Test Plans for HPC DSP‑based SERDES PHY products, integrating verification and validation phases in a structured workflow.
• Building and maintaining robust verification environments using UVM methodology and SystemVerilog, including VIP integration.
• Developing, optimizing, and sharing automation scripts (Shell, Perl, Python, C++, AI‑based approaches) to support design, verification, and testing.
• Collaborating with product stakeholders and project owners to ensure technical challenges are resolved and milestones are met.
• Creating and executing comprehensive test plans for high‑speed data recovery circuits, ensuring thorough coverage and traceability.
• Sharing knowledge and best practices with team members and project owners, driving clarity and continuous improvement.

The Impact You Will Have:

• Directly influence the implementation and quality of flagship silicon IP products.
• Accelerate time‑to‑market for high‑performance SoCs through effective testplan execution.
• Advance innovation in data recovery and signal processing, impacting global standards.
• Provide technical leadership and mentorship, supporting global customer success.
• Contribute to a knowledge‑sharing, inclusive engineering culture.
• Drive opportunities for advancement and professional growth for yourself and others.

What You’ll Need:

• 10+ years of ASIC development and mixed‑signal verification experience.
• Expertise in PCIe, Ethernet protocols, and digital signal processing.
• Advanced skills in SystemVerilog and UVM methodology for verification environment implementation.
• Proficiency in scripting (Shell, Perl, Python, C++); experience with AI‑driven automation is a plus.
• Strong organizational and communication skills with a proven record of delivering solutions under tight deadlines.

Who You Are:

• Hands‑on, solution‑oriented, and technically driven.
• Effective communicator and mentor, eager to share knowledge.
• Collaborative, adaptable, and inclusive in your approach.
• Detail‑focused, organized, and committed to quality.
• Dedicated to continuous learning, growth, and innovation.

The Team You’ll Be A Part Of:

You’ll join a multidisciplinary engineering team advancing silicon IP solutions for global customers. The team is comprised of industry experts focused on mentorship, technical excellence, and continuous improvement in a respectful, inclusive environment.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusive work culture supporting diverse backgrounds and experiences.

Reasonable accommodations available throughout the recruitment and employment process.

For accommodation requests, contact [e-mail].