Design Verification Engineer

ZipRecruiter; Bristol; On-site; GBP 100,000 - 125,000; Full time

Job summary

A leading technology firm is seeking an experienced ASIC Verification Engineer for its Bristol or Cambridge location. The role involves essential verification activities, providing feedback to architects, and ensuring effective communication between teams. Candidates should have experience in verification processes, particularly within CPU or ASIC environments and proficiency in System Verilog, Python, and C++. The company offers competitive compensation along with flexible working and strong benefits.

Benefits

Flexible working

Generous annual leave policy

Private medical insurance

Pension (matched up to 5%)

Life assurance and income protection

Qualifications

• Proven leadership and planning skills.
• Ability to work across teams to find root causes of deep and complex issues.
• Experience of the verification process applied in CPU and/or ASIC environments.

Responsibilities

• Conduct verification activities within the verification team.
• Ensure good communication between sites.
• Provide feedback to architects.
• Perform test and failure diagnosis/triage.

Skills

Verification experience in relevant industry

System Verilog

Python

C++

UVM

Tools

Linux

LLVM

GCC

XML

XPath/XSLT

Job description

Job Summary

ASIC Verification Engineer

Bristol or Cambridge

3 days onsite work

Leading compensation and benefits package

This is a superb opportunity to join one of the hottest names in the industry! A chance to build a technology that transforms the future of humanity. A chance to work on products that have set the standard in made-for-AI compute hardware and software. A chance to be part of the AI revolution!

Whilst this is an individual contributor role you can expect a clear career path and progression into technical leadership and managerial roles if that is something you seek.

I am looking for Verification Engineers to join a world class Silicon Engineering team, joining a company who bring large and ongoing investment from one of the world’s leading backers of innovative AI companies! SW Verification experience with Python, C/C++ is welcome alongside the traditional UVM based Verification.

Responsibilities

• Verification activities within the verification team
• Ensuring good communication between sites
• Verification planning, specification and closure of functional coverage
• Providing feedback to architects
• Test and failure diagnosis/triage
• Contributing to shared verification infrastructure

Candidate Profile

Essential:

• Verification experience in relevant industry
• Proven leadership and planning skills
• Ability to work across teams and programming to find root causes of deep and complex issues
• Experience of the verification process applied in CPU and/or ASIC environments
• System Verilog, Python, C++, Linux
• UVM
• SVA
• LLVM, GCC
• SGE or other DRMS
• XML and XPath/XSLT

Benefits

In addition to a competitive salary, you can expect flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection.

For more info please contact Rachel Mason at IC Resources