Postdoctoral position in embedded computing – LS2N

Nantes Université; France; Sur place; EUR 30 000 - 45 000; Plein temps

Résumé du poste

A French research institution is seeking a Postdoc to evaluate ML algorithms on new space platforms that utilize commercial off-the-shelf components. The role focuses on fault tolerance methods in hardware design. Candidates should hold a PhD in computer science or electronics, with a strong background in hardware verification. This position offers a full-time, temporary contract with competitive benefits and professional equality initiatives.

Prestations

Transport subscription up to 75% supported

Access to university restaurants

Access to sports and activities on campus

Qualifications

• Must have obtained their PhD in the last three years.
• Solid background in hardware design and verification.
• Hands-on experience with FPGA prototyping is highly desirable.

Responsabilités

• Evaluate the robustness of ML algorithms on ARM-based platform.
• Conduct fault injection campaigns on target hardware.
• Propose fault-tolerance co-design strategies.

Connaissances

PhD in computer science or electronics

Hardware design and verification (HDL: VHDL/Verilog)

FPGA prototyping

Good communication skills in English

Formation

PhD or equivalent in relevant field

Description du poste

Organisation/Company Nantes Université Research Field Computer science » Computer hardware Computer science » Digital systems Computer science » Systems design Researcher Profile Recognised Researcher (R2) Positions Postdoc Positions Country France Application Deadline 5 Dec 2025 - 23:59 (Europe/Paris) Type of Contract Temporary Job Status Full-time Hours Per Week 37h15 Offer Starting Date 5 Jan 2026 Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the Job related to staff position within a Research Infrastructure? No

Offer Description

Evaluation of the robustness of ML algorithms executed on a non-hardened accelerator through circuit-level fault-injection

The project addresses the challenges of deploying AI applications on Commercial-Off-The-Shelf (COTS) components in the space domain, a growing trend within the so-called new-space movement. While COTS technologies offer significant performance and cost advantages, they lack radiation hardening and are therefore highly susceptible to transient hardware faults (e.g., radiation-induced bit flips).

The goal is to explore fault tolerance co-design strategies (hardware and software) that ensure predictable timing, performance, and safety for AI workloads running on a new space platform. The project relies on the POMELOS platform [1] and the SPARROW accelerator [2], a specialized hardware accelerator designed for efficient CNN execution on ARM-based COTS processors.

The recruited researcher will focus on the evaluation of the robustness of ML algorithms executed on an ARM-based new space platform integrating the SPARROW accelerator through circuit-level fault injection. The main objectives are:

• Define a representative fault model for the SPARROW accelerator.
• Develop methods to instrument the HDL code of SPARROW (e.g., with logic gates and multiplexers) to simulate transient faults, ideally through automated insertion.
• Conduct fault injection campaigns on the target hardware platform to evaluate the impact of transient faults on CNN accuracy and robustness.
• Propose new fault-tolerance co-design strategies to improve dependablity of new space systems

The results will help characterize how faults propagate through the system and distinguish between minor, tolerable faults and critical ones requiring mitigation.

[1] POMELOS SpaceTechDroneTech CPER platform, at http://beru.univ-brest.fr/pomelos

[2] Bonet, M. S., & Kosmidis, L. (2022, March). SPARROW: a low-cost hardware/software co-designed SIMD microarchitecture for AI operations in space processors. In 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE) (pp. 1139-1142). IEEE.

Where to apply

E-mail [e-mail]

Requirements

Research Field Computer science » Computer hardware Education Level PhD or equivalent

Research Field Computer science » Digital systems Education Level PhD or equivalent

Research Field Computer science » Systems design Education Level PhD or equivalent

Skills and Qualifications

• Candidates must have obtained their PhD in computer science or electronics with a specialization in embedded systems or hardware design within the last three years.
• Solid background in hardware design and verification (HDL: VHDL/Verilog, simulation tools).
• Hands‑on experience with FPGA prototyping or hardware/software co‑design is highly desirable.
• Good communication skills in English (required), as project meetings will be conducted in English.

Specific Requirements

• Additional assets (not mandatory):
• Knowledge of fault injection techniques or hardware reliability.
• Understanding of hardware accelerators for AI and their operation.
• Familiarity with machine learning workloads (e.g., CNNs).

As this is a research position, it is necessary to be able to work in a team, write state‑of‑the‑art reports, and write scientific articles.

Languages ENGLISH Level Good

Research Field Computer science » Computer hardware Years of Research Experience 1 - 4

Research Field Computer science » Digital systems Years of Research Experience 1 - 4

Research Field Computer science » Systems design Years of Research Experience 1 - 4

Additional Information

• Commitment to professional equality, diversity and inclusion and addressing gender‑based and sexual violence
• Membership in the EUniWell European Alliance committed to wellness
• Certified HR Excellence in Research since 2022 as part of the HRS4R strategy
• Transport subscription up to 75 % supported
• Sustainable mobility package, in line with the institution’s commitment to sustainable development
• Access to university restaurants with a preferential rate
• Access to sports, university libraries and other activities on campus

1 QUAI DE TOURVILLE, BP 13522, 44035 NANTES CEDEX 01