Analog IC Designer

ic resources; Dresden; Vor Ort; EUR 50.000 - 70.000; Vollzeit

Zusammenfassung

A specialized recruitment agency is seeking an Analog IC Designer to join a start up in Dresden. The candidate will be involved in designing and developing NVM memory devices. Responsibilities include circuit design, verification, and collaboration with layout engineers. Ideal candidates have a Master's or PhD in Electrical Engineering and experience with ADCs or DRAM. The role offers competitive salary and initial accommodation support.

Leistungen

Bonus

Initial accommodation for one month

Qualifikationen

• Master Degree or PhD in Electrical Engineering or a similar study course.
• Industry experience in analog / mixed-signal CMOS IC design.
• Familiarity with industry-standard design and simulation tools.

Aufgaben

• Support the design team in defining specifications.
• Responsible for design of analog circuits for NVM memories.
• Run PVT circuit verification including parasitic extraction.
• Work closely with layout engineers for block robustness.
• Perform post silicon verification.

Kenntnisse

Analog IC Design

Mixed-signal CMOS

ADC

Knowledge of DRAM

Knowledge of DDR interfaces

Familiarity with Cadence tools

Ausbildung

Master Degree or PhD in Electrical Engineering

Tools

Cadence® DFII

Virtuoso

Spice simulator

Verilog-A

Jobbeschreibung

Join a start up in the scenic and historical city of Dresden!

I am looking for an Analog IC Designer with industry experience for a start up company in Germany who are designing and developing emerging NVM memory devices. Candidates with experience in DRAM, DDR or interfaces 4 or 5 will be prioritised. You can expect to be a valued member of a small design team with great visibility and fast career development. My customer is developing their first product and has ambitious growth plans. The salary package reflects cost of living in Dresden and includes a bonus. One month of initial accommodation will be provided in Dresden.

Responsibilities

• Support the design team in defining specifications and integrating the designed blocks into the memory
• Responsible for the design of analog circuits for NVM memories : sense amps, decoders, bandgap, HV regulators, ADC, LDO, Charge Pumps, etc.
• Run PVT circuit verification including parasitic extraction
• Work closely with layout engineers to ensure block robustness and area optimisation
• Perform post silicon verification

Qualifications

• Master Degree or PhD in Electrical Engineering or a similar study course
• Industry experience in analog / mixed-signal CMOS IC design in ADC's or DRAM, DDR interfaces
• Familiarity with industry-standard design and simulation tools (, Cadence® DFII, Virtuoso, Spice simulator, Verilog-A)
• Good knowledge of CMOS technology

For more information and to apply, please contact Molly with your CVand a time for a short call!