Sr. ASIC Design Engineer

VisLab (an Ambarella Inc. company); Parma; In loco; EUR 35.000 - 55.000; Tempo pieno

Descrizione del lavoro

A technology company in Parma, Italy is seeking a Sr. ASIC Design Engineer to develop specifications for a next-generation Computer Vision processor. Candidates should have a Master's in Electrical Engineering, good knowledge in ASIC design, and experience with Verilog/SystemVerilog. Strong communication skills and teamwork are essential. This is a full-time associate position.

Competenze

• 0-4 years of experience in ASIC design.
• Good knowledge and experience in using Verilog/SystemVerilog.
• Knowledge of logic synthesis and timing closure.

Mansioni

• Develop micro-architecture specifications for a Computer Vision processor.
• Design and implement modules for SOCs.
• Optimize design for timing, area and power.

Conoscenze

Understanding of VLSI/ASIC design

Programming in Python

Hardware description languages (Verilog/SystemVerilog)

Communication skills

Team collaboration

Formazione

Master’s degree in Electrical Engineering

Descrizione del lavoro

We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer.

Responsibilities

• Developing micro‑architecture specifications for a next generation Computer Vision processor;
• Designing and implementing Verilog/SystemVerilog modules for cutting edge SOCs. Examples of such modules include: Video compression logic, Image processing logic, Vector processors and Device / Memory controllers;
• Design integration, logic synthesis, and design optimization for timing, area and power;
• Developing front‑end methodologies and tool flows;

Requirements

• Master’s degree in Electrical Engineering with 0‑4 years of experience;
• Very good understanding of VLSI/ASIC design, computer architecture and logic design;
• Good knowledge and experience in using hardware description languages (Verilog/SystemVerilog);
• Ability to program in scripting languages, like Python and Perl;
• Knowledge of design verification, and functional coverage;
• Strong communication skills and a good team player;
• Knowledge of logic synthesis and timing closure is a must;
• Knowledge and/or experience in the areas of Image/Video processing, computer vision, machine learning are plus;

To apply, please submit resume with subject: JOB#VLSI to [e-mail] or apply online on Ambarella website.

As an Equal Opportunity/Affirmative Action Employer, Vislab and Ambarella recruit qualified applicants without regard to race, color, national origin, sex, physical disability or veteran status.

Please find at this link our privacy disclaimer dedicated to candidates data, accordingly to the GDPR: https://tinyurl.com/yd66nbsa

Seniority level

Associate

Employment type

Full‑time

Job function

Research

Industries

Software Development and Appliances, Electrical, and Electronics Manufacturing

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