Senior Design Verification Engineer

TechTeamz; A distancia; EUR 70.000 - 90.000; Jornada completa

Descripción de la vacante

A leading technology company is seeking a Design Verification Manager to lead a global team and drive the verification strategy for production-grade silicon products. This role involves mentoring engineers, defining methodologies, and ensuring high quality in complex digital verification processes. The ideal candidate will have strong expertise in silicon design, UVM, and remote team management. If you are passionate about driving quality improvements and working in a collaborative environment, this opportunity is for you.

Formación

• Strong expertise in silicon design and verification methodologies.
• Experience with UVM, SystemVerilog, and formal verification.
• Strong skills in constrained-random and coverage-driven verification.
• Proficiency in Python scripting and automation.
• Experience managing remote, multi-site teams.

Responsabilidades

• Mentor, manage, and develop a team of design verification engineers.
• Define and own the overall verification strategy and execution plan.
• Drive the adoption, maintenance, and improvement of verification methodologies.
• Provide technical direction for verification projects.
• Collaborate with design engineers and architects for functional excellence.
• Identify verification deficiencies and measure progress towards tape-out.

Conocimientos

Silicon design expertise

Verification methodologies

UVM

SystemVerilog

Formal verification

Python scripting

Remote team management

Descripción del empleo

We have an upcoming permanent role for remote work (remote team-management experience required). They develop production-grade open-source silicon, including Root-of-Trust chips and RISC-V cores.

The Design Verification Manager will lead a multi-site DV team, own verification strategy, and drive methodology and quality improvements toward tape-out.

Key Responsibilities

• Team Leadership: Mentor, manage, and develop a team of design verification engineers, including hiring, performance reviews, and resource allocation. The team will be split over multiple sites in different time zones.
• Verification Strategy: Define and own the overall verification strategy and execution plan for complex digital blocks and full-chip verification.
• Methodology Ownership: Drive the adoption, maintenance, and continuous improvement of all verification methodologies and flows to increase efficiency, effectiveness and product quality.
• Technical Guidance: Provide technical direction for verification projects, ensuring alignment with architectural goals and project timelines.
• Cross-functional Collaboration: Work closely with design engineers, architects, and other teams to ensure functional excellence and a smooth verification process, striving to both find bugs and avoid bugs through joined up design and design verification best practices.
• Risk Management: Identify verification deficiencies and measure progress towards tape-out.

Required Skills

• Strong expertise in silicon design and verification methodologies
• UVM, SystemVerilog, and formal verification
• Constrained-random and coverage-driven verification
• Python scripting and automation
• Experience managing remote, multi-site teams

If interested, please share your CV in English.