Sr Engineer, SoC Design Verification Die-to-Die

Tenstorrent Inc.; Toronto; Hybrid; CAD 100,000 - 120,000; Full time

Job summary

A leading semiconductor company is seeking a SoC Design Verification Engineer to validate next-generation multi-chip SoCs. This hybrid role involves developing test plans and collaborating closely with design teams to ensure robust silicon. Ideal candidates should be skilled in SystemVerilog and familiar with AI tools. The position is located in Toronto, Ontario.

Benefits

Competitive compensation package

Qualifications

• Proven verification experience with SystemVerilog and SV-UVM.
• Experience with AI-assisted coding tools to enhance DV workflows.
• Ability to write detailed test plans and debug complex issues.

Responsibilities

• Develop and maintain D2D tests and verification infrastructure.
• Write, execute, and track test plans for SoC and chiplet designs.
• Triage, analyze, and debug issues in collaboration with teams.

Skills

SystemVerilog

SV-UVM

Python

AI-assisted coding tools

Job description

About Tenstorrent

Tenstorrent is leading the industry on cutting‑edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists has developed a high‑performance RISC‑V CPU from scratch and shares a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Role Overview

Tenstorrent is seeking a SoC Design Verification Engineer to help validate next‑generation multi‑chip and chiplet‑based SoCs, especially with Die‑to‑Die (D2D). You will work on test development, debug, and infrastructure that ensure robust, high‑performance silicon for AI and high‑compute applications. This is a hands‑on role at the forefront of verification for cutting‑edge semiconductor systems. The position is hybrid, based out of Ottawa, ON.

Who You Are

• Skilled in SystemVerilog, SV‑UVM, and Python with proven verification experience.
• Familiar with AI‑assisted coding tools like Copilot, Cursor, or Claude to accelerate DV workflows.
• Comfortable writing detailed test plans, building infrastructure, and debugging complex issues.
• Collaborative engineer who thrives in cross‑functional, fast‑paced environments.

What We Need

• Develop and maintain D2D tests and supporting verification infrastructure.
• Write, execute, and track test plans for SoC, chiplet, and multi‑chip designs.
• Triage, analyze, and debug issues in collaboration with design and architecture teams.
• Leverage modern AI tools to enhance verification productivity and coverage.
• Firmware co‑sim with RTL and CPU core debug experience preferred.

What You Will Learn

• Gain experience with advanced verification flows for chiplet and multi‑die SoCs.
• Work with emerging standards such as UCIe and BoW for die‑to‑die interconnect.
• Explore co‑simulation methodologies with frameworks such as Cocotb.
• Build expertise in the intersection of AI tools and state‑of‑the‑art verification practices.

EEO Statement

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Tenstorrent is an equal opportunity employer. Any discrimination on the basis of protected class status is prohibited. If you believe you belong to any protected veteran category or other protected class, please indicate accordingly.