Senior ASIC/FPGA Designer Verilog/SystemVerilog & CDC Expert

US Tech Solutions; Ottawa; On-site; CAD 100,000 - 130,000; Full time

Job summary

A global staff augmentation firm is seeking a Digital ASIC/FPGA Designer with over 15 years of experience and a bachelor's degree in engineering or computer science. The role requires excellent RTL ASIC/FPGA design skills in Verilog and System Verilog, along with knowledge of networking standards and experiences with design tools. This position offers the opportunity to work on advanced digital design projects in a dynamic environment.

Qualifications

• 15+ years of experience in ASIC/FPGA design.
• Excellent RTL ASIC/FPGA design skills in Verilog and System Verilog.
• Knowledge of networking standards and wired communications protocols.

Skills

ASIC RTL Design

Verilog / SystemVerilog

Clock Domain Crossing (CDC) Analysis

Functional simulation debug

RTL Synthesis

Education

Bachelor’s degree in engineering or computer science

Tools

Synopsys Design/Fusion Compiler

Synopsys VCS

Vivado Design Suite

Job description

A global staff augmentation firm is seeking a Digital ASIC/FPGA Designer with over 15 years of experience and a bachelor's degree in engineering or computer science. The role requires excellent RTL ASIC/FPGA design skills in Verilog and System Verilog, along with knowledge of networking standards and experiences with design tools. This position offers the opportunity to work on advanced digital design projects in a dynamic environment.