ASIC RTL Design Engineer – Multi-Clock & Power Optimized

Advanced Micro Devices; Markham; On-site; CAD 90,000 - 120,000; Full time

Job summary

A leading semiconductor company is seeking a design engineer to contribute to high-quality, industry-leading technologies. The role involves RTL design and coding for various IP, emphasizing scalability and reusability. Candidates should have strong analytical skills, a collaborative mindset, and a relevant educational background. The position offers opportunities to innovate and improve design processes, along with a commitment to quality deliverables in a cross-functional environment.

Qualifications

• 5 or more years of experience in design engineering.
• Strong analytical and problem-solving skills.
• Ability to produce clear technical documentation.

Responsibilities

• Perform RTL design and coding according to specifications.
• Work closely with IP/SOC architects for design documentation.
• Analyze and fix Lint and CDC/RDC errors.
• Guarantee quality/timely deliverables.

Skills

RTL ASIC digital design using Verilog/System Verilog

Debugging in digital environments

Power optimization of digital designs

Scripting languages (Perl, Tcl, Python)

Education

Bachelor’s or master’s degree in electrical or computer engineering

Job description

A leading semiconductor company is seeking a design engineer to contribute to high-quality, industry-leading technologies. The role involves RTL design and coding for various IP, emphasizing scalability and reusability. Candidates should have strong analytical skills, a collaborative mindset, and a relevant educational background. The position offers opportunities to innovate and improve design processes, along with a commitment to quality deliverables in a cross-functional environment.