Technical Leadership

Agency for Science, Technology and Research (A*STAR); Singapore; On-site; SGD 120,000 - 160,000; Full time

Job summary

A leading research organization in Singapore is seeking a talented technical leader to advance High Performance Computing initiatives. This role includes providing technical leadership, shaping research directions, and mentoring teams in areas such as hardware-software optimization and AI model training. Candidates should possess a PhD in a related field and have deep expertise in HPC systems and programming. Join a dynamic team to support Singapore's ambition as a leader in HPC-AI innovation.

Qualifications

• PhD in Computer Science, Computational Science, or equivalent industry experience.
• Deep expertise in HPC systems, including GPU clusters and heterogeneous architectures.
• Proven track record in optimizing large-scale computational workloads.

Responsibilities

• Provide technical leadership across HPC capability development.
• Shape the research and development roadmap for HPC‑AI integration.
• Engage and collaborate with ecosystem stakeholders.

Skills

Technical leadership

HPC systems optimization

Programming in C/C++

Python programming

CUDA proficiency

Experience with AI frameworks

Excellent communication skills

Education

PhD in Computer Science or related field

Tools

MPI

OpenMP

PyTorch

TensorFlow

Job description

We are seeking a talented technical leader to advance High Performance Computing (HPC) initiatives within Singapore's research and innovation ecosystem and contribute to the convergence of HPC and AI. This role provides an excellent opportunity to strengthen core HPC capabilities, build sustainable computing architectures, and support Singapore's ambition to be at the forefront of HPC‑AI innovation.

The candidate will provide technical leadership, help shape research directions, and mentor teams across multiple efforts involving hardware‑software co‑optimisation, efficient AI model training and inference, and heterogeneous deployment. The role will also involve engaging with academic collaborators, HPC providers, chip and cloud vendors, and industry partners across strategic sectors.

Strategic Research Areas

HPC Capability Development

Singapore's HPC roadmap focuses on building core HPC capabilities, including hardware‑software co‑design, profiling and tuning for performance and energy efficiency, and AI‑enabled adaptive code development for emerging HPC architectures. This focus area ensures that Singapore's HPC infrastructure can evolve rapidly with next‑generation processors, accelerators, and memory technologies.

HPC‑Enabled Efficient AI Models

With the rapid scaling of AI workloads, optimising large‑scale AI models and foundation models is a national priority. This focus area addresses distributed training frameworks, data movement and storage efficiency, and co‑optimisation of computation across GPUs, CPUs, and specialised accelerators. These efforts enable sustainable, large‑scale AI research and deployment in Singapore.

HPC‑Enabled Efficient Deployment

The growing complexity of data centres and hybrid cloud environments requires efficient workload scheduling, orchestration, and heterogeneous deployment. This focus area develops AI‑driven resource allocation and multi‑agent scheduling strategies, enabling seamless integration across supercomputers, edge clusters, and cloud platforms. It directly supports national priorities in sustainability, advanced manufacturing, and healthcare.

Description of Responsibilities

• Provide technical leadership across HPC capability development, AI model optimisation, and deployment efficiency focus areas.

• Shape the research and development roadmap for HPC‑AI integration, with a focus on scalability, sustainability, and translational outcomes.

• Engage and collaborate with ecosystem stakeholders, including NSCC, global HPC centres, chip vendors, cloud providers, and industry partners, to ensure alignment with national priorities and foster strategic collaborations.

• Mentor and grow Singapore's HPC‑AI talent pipeline, including researchers, engineers, and postdoctoral fellows.

• Lead or co‑lead research projects and industry engagements where deep technical expertise is critical.

• Drive high‑quality publications, open‑source contributions, and where appropriate, protect intellectual property through patents.

• Represent Singapore's HPC initiatives at international forums and strengthen global visibility for the ecosystem.

Key Technical Areas

• Hardware‑Software Co‑optimisation: GPU/CPU/FPGA tuning, chip‑specific profiling, compiler optimisation.

• AI Model Efficiency: Foundation/LLM optimisation, distributed training, scalable inference, data movement strategies.

• Deployment Scalability: Resource scheduling, workload orchestration, heterogeneous HPC environments, multi‑agent coordination.

• Energy Efficiency: Sustainable computing architectures, power‑aware resource allocation, carbon‑aware scheduling.

Required Qualifications

• PhD in Computer Science, Computational Science, or related field (or equivalent industry experience).

• Deep expertise in HPC systems, including GPU clusters, parallel/distributed computing, and heterogeneous architectures.

• Proven track record in optimising large‑scale computational workloads and/or AI model deployment.

• Strong programming skills in C/C++, Python, CUDA, and familiarity with HPC frameworks (MPI, OpenMP).

• Experience with AI/ML frameworks (e.g. PyTorch, TensorFlow) and their integration with HPC systems.

• Demonstrated leadership of technical teams and complex, multi‑stakeholder projects.

• Excellent communication skills for engaging with researchers, industry, and government stakeholders.

Preferred Qualifications

• Knowledge of domain‑specific applications in sustainability, manufacturing, or healthcare.

• Track record of successful industry collaborations, technology transfer, and translational impact.

• Experience with cloud‑based HPC and hybrid computing environments.

• Familiarity with quantum‑classical hybrid computing concepts and future integration paths.