Standard Cell Library Engineer

ALPSOFT TECHNOLOGIES PTE. LTD.; Singapore; On-site; SGD 60,000 - 90,000; Full time

Job summary

A technology solutions company in Singapore is looking for an experienced engineer to develop complex circuit blocks and perform data analysis for cutting-edge technologies. The ideal candidate will hold a BS/MS in Electrical Engineering or related fields and possess strong skills in Python, Perl, and data analysis. Responsibilities include collaboration with cross-functional teams for test chip design and library generation, with a focus on circuit performance and power assessment. This position may also suit entry-level candidates with relevant education.

Qualifications

• Minimum 3 years (MS) or 5 years (BS) of industry experience required.
• Entry-level position is available with no prior experience required.
• Familiarity with Python, Perl, Tcl or C/C++ for flow development.

Responsibilities

• Develop complex circuit block from schematic netlist to gds.
• Work with layout engineer for design implementation.
• Analyze simulation data and conduct performance assessments.

Skills

Perl

Machine Learning

Data Analysis

Quality Assurance

Python

Silicon

Physics

Circuit Design

Characterization

Cell

Visualization

IP

Transistor

Layout

Teamwork Skills

Education

BS/MS in Electrical and Electronic Engineering/Computer Engineering/Computer Science

Job description

Roles & Responsibilities

• Develop complex circuit block, test key for leading-edge process node (planar, finfet, nanosheet) from schematic netlist to gds.
• Develop standard cell library from architecture evaluation, PPA assessment and customized cell design with different PPA purpose and IP blocks.
• Work with layout engineer for design implementation and physical verification including DRC/LVS/ERC/ANT.
• Perform layout extraction, simulation, analyze simulation data, including performance, power, leakage, for layout dependent effect study.
• Work with digital team and testing team for design implementation and chip level silicon data collection.
• Develop processing flow for silicon data analysis, visualization, AI model regression.
• Develop advanced library generation methodology and flow, including characterization, kit generation, regression, and quality assurance.
• Perform timing/power/constraint/noise/LVF variation characterization for standard cell or complex circuit blocks.
• Work with circuit designer and tool vendors to tackle modelling difficulties, like accuracy and runtime issues, especially for complex circuit blocks.
• Responsible for new kits enablement and evaluation, like EM characterization, aging characterization.
• Involve with data analysis and machine learning as well for circuit performance and power assessment.

Requirements

• BS/MS in Electrical and Electronic Engineering/Computer Engineering/Computer Science with minimum 3 years(MS) or 5 years(BS) industry experience. (We have entry level position with the same function, no prior experience is required.)
• Familiar with Python, Perl, Tcl or C/C++ for flow development and data analysis, machine learning.
• Basic knowledge of digital design and/or circuit design.
• Solid understanding of foundation IP design, with device physics, transistor level circuit, layout dependent effect knowledge.
• Experience of test chip design in FinFet/Nanosheet technologies is a plus, with understanding of DRM, layout rules, PV check, and simulation skills.
• Strong communication and teamwork skills to collaborate effectively with cross-functional teams.

Tell employers what skills you have

• Perl
• Machine Learning
• Cell
• Data Analysis
• Quality Assurance
• Physics
• Electrical
• Circuit Design
• Characterization
• IP
• Python
• Transistor
• Visualization
• Teamwork Skills
• Layout
• Silicon