Sr. FPGA Prototyping Engineer, Silicon and Systems Group

Amazon; Milano; In loco; EUR 50.000 - 70.000; Tempo pieno

Descrizione del lavoro

A leading technology company is seeking a Sr. FPGA Prototyping Engineer to join their innovative team in Milano. In this role, you will define the FPGA bring-up environment for ASIC and system prototyping while collaborating with multidisciplinary teams. The ideal candidate has a Bachelor's degree in Electrical Engineering and 5+ years of experience in FPGA design or ASIC prototyping. Excellent debugging skills and proficiency in Python are also essential for success in this position. This role promises to engage with advanced architectures to improve consumer electronics.

Competenze

• 5+ years of FPGA design or FPGA-based ASIC prototyping.
• Experience with writing and debugging test code for embedded systems (C/C++).
• Experience with prototype bring-up and strong hardware debug skills.

Mansioni

• Define the FPGA bring-up environment for ASIC and system prototyping.
• Work closely with multi-disciplinary groups to implement FPGA solutions.
• Create and enhance verification of IPs using the FPGA environment.

Conoscenze

FPGA design

Scripting in Python

Debugging embedded systems

Hardware debug skills

Formazione

Bachelor's degree in Electrical Engineering

Master's degree or Ph.D. in Electrical Engineering

Strumenti

FPGA build flows

Synopsys HAPS

Industry standard tools

Descrizione del lavoro

Sr. FPGA Prototyping Engineer, Silicon and Systems Group

The Amazon Devices team designs and engineers high‑profile consumer electronics, including the best‑selling Kindle family of products. We have also produced groundbreaking devices like Fire tablets, Fire TV, and Amazon Echo, and the Astro personal robot. As an FPGA Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices.

In this role, you will be responsible for defining the FPGA bring‑up environment for ASIC and system prototyping. You will participate in the design, verification and bring‑up of IPs in FPGA by writing relevant scripts, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will be responsible for the lab bring‑up of these blocks. You will work closely with multi‑disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement FPGA solutions that enable development of world‑class hardware devices.

Key job responsibilities

• Design world‑class hardware and software
• Communicate and work with team members across multiple disciplines
• Deliver IP's in FPGA platforms for software teams
• Create and enhance verification of these IP's by leveraging the FPGA environment
• Identify and write all types of tests for stimulus and corner cases
• Debug tests with design engineers to deliver functionally correct design blocks

Basic Qualifications

• Bachelor's degree in Electrical Engineering or a related field
• Experience with industry standard tools and scripting languages (Python or Perl) for automation
• 5+ years of FPGA design or FPGA‑based ASIC prototyping
• Experience with FPGA build flows
• Experience with writing and debugging bring‑up / test code for embedded systems (C/C++)
• Experience in prototype bring‑up with strong hardware debug skills

Preferred Qualifications

• Master's degree or Ph.D. degree in Electrical Engineering or related field
• Experience in system‑level debugging
• Experience working with high‑performance industry standard buses like AMBA AXI4
• Experience with post‑silicon validationExperience with embedded systems
• Experience with transaction‑level modeling
• Knowledge of SoC architecture
• 7+ years or more of FPGA design or FPGA‑based ASIC prototyping
• Experience with ARM and various DSP ISA
• Good programming skills in C/C++ and scripting skills in Python, Tcl, and/or Perl
• Experience with industry standard I/O interfaces
• Experience with ASIC prototyping on FPGAs
• Experience with Synopsys HAPS

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