Sr. Asic Design Engineer

VisLab (an Ambarella Inc. company); Parma; In loco; EUR 40.000 - 60.000; Tempo pieno

Descrizione del lavoro

A leading technology firm in Parma, Italy, is looking for a Sr. ASIC Design Engineer to develop micro-architecture specifications for next generation computer vision processors. The ideal candidate will have a Master's in Electrical Engineering and experience in VLSI/ASIC design and hardware description languages. Strong communication skills and the ability to work well in teams are essential. Opportunities include collaborating on innovative projects in image processing and machine learning.

Competenze

• Master’s degree in Electrical Engineering with 0-4 years of experience.
• Very good understanding of VLSI / ASIC design, Computer architecture and Logic design.
• Good knowledge of hardware description languages.

Mansioni

• Develop micro-architecture specifications for Computer Vision processor.
• Design and implement Verilog / SystemVerilog modules.
• Conduct design integration and optimization tasks.

Conoscenze

VLSI / ASIC design

Computer architecture

Verilog

SystemVerilog

Python

Perl

Design verification

Image processing

Machine learning

Formazione

Master’s degree in Electrical Engineering

Descrizione del lavoro

We’re growing! Our team in Parma (Italy) is seeking a Sr. ASIC Design Engineer.

Responsibilities

• Developing micro-architecture specifications for a next generation Computer Vision processor;
• Designing and implementing Verilog / SytemVerilog modules for cutting edge SOCs. Examples of such modules include : Video compression logic, Image processing logic, Vector processors and Device / Memory controllers;
• Design integration, logic synthesis, and design optimization for timing, area and power;
• Developing front-end methodologies and tool flows;

Requirements

• Master’s degree in Electrical Engineering with 0-4 years of experience;
• Very good understanding of VLSI / ASIC design, Computer architecture and Logic design;
• Good knowledge and experience in using hardware description languages (Verilog / SystemVerilog);
• Ability to program in scripting languages, like Python and Perl;
• Knowledge of design verification, and functional coverage;
• Strong communication skills and a good team player;
• Knowledge of logic synthesis and timing closure is a must;
• Knowledge and / or experience in the areas of Image / Video processing, computer vision, machine learning are plus;

To apply, please submit resume with subject : JOB#VLSI to [e-mail] or apply online on Ambarella website.

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