MCU Architect

beBeeTechnical; Málaga; Presencial; EUR 80.000 - 100.000; Jornada completa

Descripción de la vacante

A leading technology firm in Málaga is seeking a skilled technical strategist to lead the development of next-generation RISC-V MCU solutions. You will define the architecture, ensuring market needs and performance requirements are met, driving product development with a customer-first mindset. Ideal candidates have a master's degree in engineering and over 5 years of semiconductor development experience, particularly with RISC-V technologies.

Formación

• 5+ years of experience in semiconductor-based product development.
• Deep understanding of RISC-V ISA and extensions.
• Background in low power and security techniques.

Responsabilidades

• Define overall architecture of RISC-V MCU.
• Translate market requirements into hardware specifications.
• Develop design principles for testability and manufacturing.

Conocimientos

Semiconductor-based product development

RISC-V ISA understanding

Low power techniques

System on Chip (SoC) integration

Communication skills

Educación

Master's degree in electronic/computer/telecom engineering

Descripción del empleo

We are looking for a highly skilled technical strategist to lead the development of next-generation RISC-V MCU solutions. This role requires expertise in semiconductor-based product development, with a focus on cost efficiency, low power consumption, and standard compliance.

Job Description

As our technical leader, you will define the overall architecture of the RISC-V MCU, ensuring it meets target market needs while staying competitive in terms of cost, power consumption, and performance. Your key responsibilities will include :

• Translating market requirements into hardware specifications, including RISC-V ISA extensions, performance targets, low power modes, target cost per chip, and manufacturing process node.
• Ability to translate use cases on performance / power / cost requirements, ensuring alignment with business opportunities.
• Selecting core type (from available options in the market to in-house designed cores), defining memory hierarchies, peripherals specifications, interconnect architecture, and security features.
• Defining RISC-V toolchain and RTOS / OS support, maintaining SDKs and HAL for developers, and defining debug and profiling support.
• Leading and driving the power, performance, area trade-off definition with the engineering team.
• Developing design principles for testability and manufacturing, including compliance with regulations and industry standards, while keeping an eye on RISC-V Foundation standards.

Cross-functional collaboration with design, integration, and validation engineers is essential, with a focus on serving customer expectations and go-to-market strategies.

Requirements

• 5+ years of experience in semiconductor-based product development.
• Master's degree in electronic engineering, computer engineering, telecoms engineering, or other discipline with a focus on semiconductor design.
• Deep understanding of RISC-V ISA and extensions, interrupt controllers, debug modules, privilege levels, with experience evaluating off-the-shelf and custom RISC-V cores.
• SoC integration experience, including memory hierarchy design and power domain modes.
• Background in low power and security techniques (e.g., clock and power gating, wake-up latency minimization, and secure boot, update, and RoT concepts).
• RISC-V toolchain practical understanding, in combination with RTOS, HAL, and FW / HW co-design principles awareness.
• Pre-silicon verification strategies know-how, post-silicon bring-up, and power measurements techniques awareness.
• Familiarity with different IoT market verticals and applications where the embedded devices ecosystem plays stronger.
• Skilled in semiconductor lifecycle phases, milestones, and deliverables, from spec to mass production, including awareness on regulations and industrial standards.
• Architecture technical documentation definition and development, team cross-functional communication, negotiation, and decision-making under constraints.
• Customer-first mindset, translating market needs on product requirements within the go-to-market timeline.