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Sr/ IC Design Engineer (Design Verification)

ETHOS TECH ONE PTE. LTD.

Singapore

On-site

SGD 60,000 - 80,000

Full time

Today
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Job summary

A leading technology firm in Singapore is seeking a verification engineer to develop and review test plans for IC design. The ideal candidate will have a degree in Electrical/Electronics/Computer Engineering and at least 1 year of experience in Silicon/IP verification using SystemVerilog/UVM. Strong communication and analytical skills are essential. This role involves creating testbenches, ensuring products meet performance standards, and collaborating with remote designers.

Qualifications

  • Minimum 1 year of experience in IC verification.
  • Strong understanding of verification process from test plan to coverage completion.
  • Understanding of HDL (Verilog, VHDL).

Responsibilities

  • Develop and review test plan based on IC design specification.
  • Create and debug tests for DUT.
  • Implement coverage matrix using cover point and assertion.

Skills

Hands-on experience in Silicon/IP verification using SystemVerilog/UVM
Strong communication skills
Analytical skills

Education

Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering

Tools

Cadence
Synopsys
Job description
Overview
  • Develop and Review Test Plan based on IC design specification
  • Develop constrained-Random verification environment for complex DUT
  • Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance
  • Implement coverage matrix using cover point and assertion
  • Create and debug tests for DUT
  • Resolve bugs with remote designers
Requirements
  • Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering with min 1 year of experience
  • Hands-on experience in Silicon/ IP verification using SystemVerilog/ UVM
  • Strong understanding of verification process from test plan to coverage completion
  • Strong communication and Analytical skills
  • Understanding of HDL (Verilog, VHDL)
  • Experience in using leading EDA software tools like Cadence/ Synopsys
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