Senior Physical Design Engineer – Power, Timing & STA Expert

MAXLINEAR ASIA SINGAPORE PRIVATE LIMITED; Singapore; On-site; SGD 110,000 - 150,000; Full time

Job summary

A leading semiconductor company in Singapore is seeking an experienced IC Design Engineer with over 12 years of experience. The role involves performing design synthesis, creating timing constraints for various modes, and working closely with physical design engineers to manage netlist and timing issues. Candidates should have a Master's or Bachelor's degree in Electrical/Electronics Engineering and proficiency in Synopsys and Cadence tools. Strong communication skills and teamwork are essential for this role.

Qualifications

• At least 12 years of relevant working experience in IC design.
• Strong teamwork abilities and independent working skills.
• Good written and communication skills.

Responsibilities

• Perform Design synthesis with Synopsys/Cadence toolset.
• Create timing constraints for functional and DFT modes.
• Conduct Logic equivalence checks.
• Work with physical design engineer to resolve netlist issues.

Skills

Experience with Synopsys tool suite

Experience with Cadence toolsuite

Proficient in TCL scripting

Python knowledge

Education

Master’s/Bachelor’s Degree in Electrical/Electronics Engineering

Job description

A leading semiconductor company in Singapore is seeking an experienced IC Design Engineer with over 12 years of experience. The role involves performing design synthesis, creating timing constraints for various modes, and working closely with physical design engineers to manage netlist and timing issues. Candidates should have a Master's or Bachelor's degree in Electrical/Electronics Engineering and proficiency in Synopsys and Cadence tools. Strong communication skills and teamwork are essential for this role.