Principal Analog Design Engineer

The Boland Group; Cascina Vignazza; In loco; EUR 85.000 - 110.000; Tempo pieno

Descrizione del lavoro

A leading technology company is looking for a Principal Analog Design Engineer to join their Optical PHY team in Pavia, Italy. This role involves designing high-speed and optical transceivers, requiring extensive experience in IC design and analog engineering. Candidates should have a Master's degree or Ph.D. in Electrical Engineering, along with 12-15 years of relevant experience. Proficiency in Italian and English is essential. The position is full-time and on-site.

Servizi

Bonus

Signing Bonus

Paid Relocation

Competenze

• 12-15 years of professional experience in analog design and IC production.
• Experience with multi-Gbps electrical SerDes or electro-optical transceivers preferred.
• Proficiency in both Italian and English (minimum B2 level).

Mansioni

• Analyze block specifications and own transistor-level designs.
• Model and validate circuit blocks; supervise layout activities.
• Collaborate with engineering teams and mentor junior designers.
• Manage pre-silicon and post-silicon tasks through to production.

Conoscenze

IC Design

Analog Design

Circuit Validation

Project Management

Formazione

Master's degree or Ph.D. in Electrical Engineering

Strumenti

EDA CAD tools

Descrizione del lavoro

Overview

Principal Analog Design Engineer
Pavia, Italy €85,000 to €110,000 + Bonus + Signing Bonus + Paid Relocation

This role is a key position within our Optical PHY (CE-OPHY) team, which is part of our Central Engineering division. Our team is at the forefront of designing high-speed and optical transceivers for modern communication infrastructure. This technology is critical for addressing the explosive demand for bandwidth in mega data centers that power social media, video-on-demand, gaming, and other real-time data streams. We are dedicated to developing innovative, first-to-market chips and subsystem solutions that push the boundaries of data rates and power efficiency.

Responsibilities

• Design & Architecture: Analyze block specifications, taking ownership of transistor-level design and selecting the most appropriate topologies. Design entire analog macros or IPs from initial concept to final mass production.
• Verification & Validation: Model and validate circuit blocks. Supervise and guide layout activities, provide clear guidelines, and conduct rigorous post-layout verifications to ensure design integrity.
• Collaboration & Leadership: Collaborate with other engineering teams to enhance existing solutions and participate in cross-functional meetings. Train and mentor junior designers to build the team's collective expertise.
• Project Management: Manage pre-silicon tasks (simulation and modeling) and post-silicon tasks (lab characterization, debugging, and correlating measurements to simulations) through to high-volume production.

Candidate Profile

• Education & Experience: Master's degree or Ph.D. in Electrical Engineering or a related field; 12-15 years of professional experience.
• Technical Skills: Proven experience in designing ICs from architecture definition through lab characterization and volume production. Solid experience in analog design (multi-GHz range), proficiency in supervising custom analog layout, using standard EDA CAD tools, and debugging designs to correlate simulations with measurements.
• Preferred Qualifications: Experience with multi-Gbps electrical SerDes or electro-optical transceivers; knowledge of advanced CMOS nodes including FinFET.
• Personal Skills: Strong communication, presentation, and documentation skills. Proficiency in both Italian and English (minimum B2 level).

Work Model

This is an on-site, full-time position located in Pavia, Italy.