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Hardware IP Verification Methodology Lead

Advanced Micro Devices

Cambridge

Hybrid

GBP 80,000 - 110,000

Full time

Today
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Job summary

A global technology firm in Cambridge is seeking a Hardware IP Design Verification Lead to drive the verification strategy for complex hardware IP blocks. The ideal candidate will have extensive experience in SOC and IP Design Verification, managing teams, and using advanced methodologies. Responsibilities include defining verification strategies and deploying cutting-edge tools, with a focus on innovation and quality. This full-time position offers a dynamic environment with a hybrid work model and competitive benefits.

Benefits

Competitive benefits
Flexible working options
Career advancement opportunities

Qualifications

  • Proven track record of managing global teams and delivering high-quality designs.
  • Experience leading large multinational teams on complex semiconductor projects.
  • Solid experience in verifying memory interfaces and communication protocols.

Responsibilities

  • Define a top-down Design Verification Strategy for the next generation IP.
  • Lead the development and deployment of cutting-edge verification tools.
  • Take part in DV Strategy, Planning and Signoff reviews.

Skills

IP and SoC-level verification
Verification tools and methodologies (UVM, Formal Verification)
RTL design (Verilog, SystemVerilog)
Scripting languages (Python, Shellscript)
Memory interfaces verification (LPDDR, HBM, GDDR)
Communication protocols (Mipi, HDMI, SPI, USB)
AI applications knowledge
Excellent communication skills
Leadership skills
Problem-solving skills

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Tools

Verification tools and methodologies
Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE:

AMD Inc. is seeking an experienced Hardware IP Design Verification Lead to drive the strategy, execution, and delivery of top‑down functional and formal verification for complex hardware IP blocks and subsystems. This senior technical leader will define and implement a modern design validation strategy, mentor a team of verification leads and engineers, and collaborate cross‑functionally to ensure the highest standards of quality and reliability for AMD’s cutting‑edge silicon IP portfolio.

THE PERSON:

The ideal candidate is a strategic thinker and hands‑on technical leader with deep expertise in IP and SoC‑level verification. You have a proven track record of managing global teams, delivering high‑quality designs on aggressive schedules, and deploying advanced verification methodologies. You are passionate about innovation, quality, and continuous improvement, and thrive in fast‑paced, cross‑functional environments.

KEY RESPONSIBILITIES:
  • Define a top‑down Design Verification Strategy for the next generation IP.
  • Work with all Subsystem leaders to define a DV strategy that fits into the overall strategy.
  • Lead the development and deployment of cutting‑edge verification tools and methodologies.
  • Assess existing testbench infrastructure and work with the teams to agree priorities for development/improvements.
  • Work with the project management team to align on DV schedule and resources.
  • Track DV metrics across the project and help to make real‑time corrections to DV planning and execution. Escalate risk and opportunities to engineering and project Management.
  • Take part in DV Strategy, Planning and Signoff reviews and act as an ultimate gate for DV signoff.
  • Foster a culture of innovation, top quality, and technical excellence.
PREFERRED EXPERIENCE:
  • Senior industry experience in SOC and IP Design Verification.
  • Demonstrate deep expertise in Verification tools and Methodologies (e.g. UVM, Formal Verification, FPGA/Emulation, System level verification) as well as in RTL design (Verilog, SystemVerilog) and scripting languages (Python, Shellscript).
  • Proven track record of successful tape‑outs on time of major IP and SOCs.
  • Experience leading large multi‑national teams on complex semiconductor projects.
  • Solid experience verifying memory interfaces (LPDDR, HBM, GDDR), communication protocols (Mipi, HDMI, SPI, USB, etc).
  • Knowledge/Interest in AI applications to Si DV flow.
  • GPU IP experience a definitive plus.
  • Excellent communication, leadership, and problem‑solving skills, with the ability to work effectively within global, cross‑functional teams.
EDUCATION:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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