EDA & CAD Engineer

microTECH Global Ltd; Reading; On-site; GBP 60,000 - 80,000; Full time

Job summary

A leading technology company in Reading is seeking an experienced EDA/CAD Engineer to manage and maintain an integrated EDA environment. The ideal candidate should have several years of experience in supporting both analog and digital IC design teams, along with strong programming skills in languages such as Shell, Python, and Perl. Responsibilities include flow development, vendor management, and PDK support. This role offers the opportunity to contribute significantly to advanced design solutions.

Qualifications

• Experience in EDA/CAD engineering supporting both analog and digital IC design teams.
• Proven expertise at advanced technology nodes and associated PDKs.
• Hands-on expertise with key tools across analog/RF, physical verification, and digital implementation.

Responsibilities

• Manage and maintain an integrated analog/digital EDA environment.
• Design, automate, and validate robust CAD flows.
• Provide expert guidance to design engineers and troubleshoot tool issues.
• Serve as primary technical contact with EDA vendors.
• Contribute to PDK installation, qualification, and deployment.

Skills

Shell programming

Python programming

Perl programming

Tcl programming

SKILL programming

GUI development

Build automation

EDA/CAD flow development

Communication skills

Problem-solving skills

Education

Bachelor or Master of Science Degree in Electrical Engineering

Tools

Cadence Virtuoso

Synopsys Design Compiler

Siemens Calibre

Cadence Innovus

Job description

Overview

My client is an innovative leader in high-speed and energy efficient chip-chip link solutions, seeking an experienced EDA/CAD Engineer to join its UK Design center.

Responsibilities

• Manage and maintain an integrated analog/digital EDA environment, including installation, configuration, and support of tools such as Cadence Virtuoso, Synopsys platforms, and Siemens Calibre/AFS.
• Flow development & automation: design, automate, and validate robust CAD flows for simulation, physical verification, parasitic extraction, and reliability analysis.
• Methodology support: provide expert guidance to analog and digital design engineers; troubleshoot tool issues; optimize design methodologies for performance and quality.
• Vendor management: serve as the primary technical contact with EDA vendors to resolve complex issues, drive bug fixes, and evaluate new versions/features.
• PDK installation & support: contribute to installation, qualification, and deployment of PDKs for advanced technology nodes.
• Design enablement: create and maintain clear documentation, training materials, and scripts so teams can use tools and flows effectively.
• Continuous improvement: proactively identify bottlenecks and implement solutions that improve productivity, accuracy, and turnaround time.

Skills

• Strong programming skills: Shell, Python, Perl, Tcl, SKILL; ability to develop simple GUIs; Make-based build automation.
• Solid understanding of the full chip-design lifecycle and digital, analog, and mixed signal IC design flows.
• Strong communication and interpersonal skills; collaborates effectively with engineering teams and vendors.
• Excellent problem solving skills with the ability to prioritize and manage multiple tasks in a fast paced environment.
• Proficient in EDA/CAD flow development while balancing stakeholder needs (quality, schedule, and compute efficiency).
• Ability to quickly learn, understand, maintain, and enhance complex software design tools.

Experience

• Bachelor or Master of Science Degree, in Electrical Engineering, Computer Engineering, Computer Science.
• Several years in an EDA/CAD engineering supporting both analog and digital IC design teams.
• Proven experience at advanced technology nodes and associated PDKs. Practical knowledge of industry-standard methodologies, tool licensing, revision control, and release management.
• Hands-on expertise with key tools across: Analog/RF (Cadence Virtuoso Schematic/Layout, ADE, Spectre/APS/AFS), Physical Verification (Siemens Calibre; Cadence Pegasus), Parasitic Extraction (Cadence Quantus), and Digital Implementation (Synopsys Design Compiler & IC Compiler II; Cadence Innovus).
• Proven experience at advanced technology nodes and associated PDKs.
• Practical knowledge of industry standard methodologies, tool licensing, revision control, and release management.