Contract Senior Firmware Engineer

Fyre Global Ltd; Reading; On-site; GBP 150,000 - 200,000; Full time

Job summary

A leading engineering firm in Reading is seeking an experienced Senior Firmware Engineer to work on complex FPGA and signal processing firmware. This hybrid role involves developing high-quality firmware, verifying designs, and conducting integration testing. Candidates should have a strong background in FPGA design and be eligible for SC Clearance. The project is expected to last 12 months and offers competitive rates outside IR35.

Qualifications

• Strong background in FPGA architecture design.
• Experience with DSP design and signal processing (RF, ADCs, DACs).
• Hands-on digital logic design at RTL level.

Responsibilities

• Develop FPGA firmware to industry standards, including signal processing blocks.
• Build testbenches, verify designs, and work across large FPGAs.
• Test firmware on hardware and support system-level integration.

Skills

FPGA architecture design

DSP design and signal processing

Digital logic design at RTL level

VHDL or Verilog

Experience with Xilinx toolchains

Tools

Vivado

Vitis

Petalinux

Job description

Contract Senior Firmware Engineer - FPGA / Firmware / Signal Processing - Reading - Hybrid - Outside IR35

We're supporting a growing engineering team who need an experienced Senior Firmware Engineer on a long-term contract. You'll be working on complex FPGA and signal processing firmware, with 2-3 days a week on-site in Reading. The project is expected to run for around 12 months and sits outside IR35.

Please note that you must be eligible for SC Clearance for this contract (though you do not need to already be SC Cleared).

What you'll be doing

• Develop FPGA firmware to industry standards, including signal processing blocks, high-speed interfaces, and glue logic
• Build testbenches, verify designs, and work across large FPGAs, SoCs, and PLDs
• Test firmware on hardware and support system-level integration
• Plan work with the team lead and deliver against agreed milestones
• Contribute to code reviews and day-to-day firmware team activities

What we're looking for

• Strong background in FPGA architecture design
• Experience with DSP design and signal processing (RF, ADCs, DACs)
• Hands-on digital logic design at RTL level
• VHDL or Verilog exposure in a commercial environment
• Experience with Xilinx toolchains is a bonus (Vivado, Vitis, Petalinux)

Details

Start: ASAP

Location: Reading / Hybrid

Duration: 12 months

Rate: £#removed# per day (depending on experience), Outside IR35