Senior RTL Validation Architect – Remote

TechTeamz; A distancia; EUR 50.000 - 75.000; Jornada completa

Descripción de la vacante

A leading technology firm is seeking a highly skilled Digital Verification Engineer to oversee the development and validation of next-generation SoC designs. This role focuses on functional verification at the RTL level, ensuring design correctness and compliance across complex interfaces. The ideal candidate will work remotely from Spain, developing verification plans, maintaining environments, and debugging design issues. Candidates should have solid experience in front-end verification and familiarity with relevant protocols and tools.

Formación

• Solid background in Front-End (RTL-level) Functional Verification.
• Hands-on experience with SystemVerilog, UVM, assertions (SVA), and coverage-driven verification.
• Familiarity with protocol verification IP (VIP) for PCIe, CXL, AXI, or equivalent.
• Strong knowledge of high-speed and low-speed interface protocols.
• Experience verifying embedded processors or microcontrollers (RISC-V, ARC, or similar).
• Proven ability to debug complex design/verification issues.

Responsabilidades

• Develop and execute functional verification plans for complex SoC subsystems.
• Follow up on and oversee verification activities throughout the development lifecycle.
• Create and maintain verification environments, testbenches, and test cases.
• Verify high-speed and low-speed interfaces (e.g., PCIe, Ethernet, DDR, AXI, I2C, SPI, UART, etc.).
• Analyze functional coverage, identify gaps, and drive closure.
• Debug simulation failures and work with design teams to resolve issues.
• Validate integration of embedded microcontroller cores (ARC32 or RISC-V).
• Track functional and code coverage, driving verification closure.
• Collaborate closely with design and architecture teams to root-cause issues and ensure robust RTL sign-off.

Descripción del empleo

A leading technology firm is seeking a highly skilled Digital Verification Engineer to oversee the development and validation of next-generation SoC designs. This role focuses on functional verification at the RTL level, ensuring design correctness and compliance across complex interfaces. The ideal candidate will work remotely from Spain, developing verification plans, maintaining environments, and debugging design issues. Candidates should have solid experience in front-end verification and familiarity with relevant protocols and tools.