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Distinguished System Architect - xPU

Huawei Technologies Canada Co., Ltd.

Markham

On-site

CAD 150,000 - 200,000

Full time

30+ days ago

Job summary

A leading technology company in Canada is seeking a Distinguished System Architect to define next-generation system architectures for AI and data center workloads. The ideal candidate holds a Ph.D. or Master’s degree and has over 15 years of experience in high-performance computing and xPU system design. This role requires strong expertise in heterogeneous computing and excellent communication skills to engage with global R&D teams and industry partners.

Qualifications

  • 15+ years of experience in high-performance computing, xPU system design, or networking chip architecture.
  • Deep expertise in ISA design (Arm) and memory systems.
  • Proven experience in heterogeneous computing and next-gen networking.

Responsibilities

  • Define next-generation xPU system architectures for AI workloads.
  • Design and optimize compute and networking acceleration architectures.
  • Publish research in top-tier conferences and contribute to patents.

Skills

High-performance computing
AI accelerators
Software-hardware co-design
Excellent communication skills

Education

Ph.D. or Master's in Computer Architecture or Electrical Engineering
Job description

Huawei Canada has an immediate permanent opening for a Distinguished System Architect.

About the team:

Initially founded in 1991 as Huawei's ASIC Design Center, the IC Lab is a leading global fabless semiconductor lab. This lab delivers trusted, cutting-edge semiconductor products and services for smart devices, contributing to smart home and mobility solutions. The local team in Canada specializes in semiconductors, and chipset solutions.

About the job:

  • Define next-generation xPU system architectures for AI and data center workloads, balancing performance, power, and scalability. Develop strategies for heterogeneous computing, including AI acceleration, networking, and cloud applications.

  • Design and optimize compute and networking acceleration architectures, including in-network computing, AI accelerators, and software-defined hardware solutions. Define memory hierarchy, cache coherence strategies, and interconnect topologies for efficient scaling.

  • Work closely with global R&D teams to align architectural roadmaps with industry trends in semiconductor, AI, and networking. Lead discussions with headquarters and external partners to advocate for architectural vision.

  • Publish research in top-tier conferences and contribute to patents and IP strategy. Collaborate with academia and industry groups to influence AI and semiconductor technology trends.


About the ideal candidate:

  • Ph.D. or Master’s in Computer Architecture, Electrical Engineering, or a related field.

  • 15+ years of experience in high-performance computing, xPU system design, or networking chip architecture.

  • Deep expertise in ISA design (Arm), vector processing, AI accelerators, and memory systems.

  • Proven experience in heterogeneous computing, HPC, and next-gen networking (RoCE, RDMA, InfiniBand, SmartNICs).

  • Strong background in software-hardware co-design, including firmware, compilers, and runtime optimizations.

  • Excellent communication skills, with experience engaging executives and global R&D teams.

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