Silicon Design Engineer 2

AMD; Singapore; On-site; SGD 70,000 - 90,000; Full time

Job summary

A leading technology company in Singapore is seeking a design verification engineer to enhance their capabilities in delivering top-tier technologies. This role involves developing tests for functional verification, collaborating with cross-site teams, and contributing to continuous innovation in processor architecture. Ideal candidates have expertise in Verilog/SystemVerilog, a degree in Computer or Electrical Engineering, and a passion for problem-solving.

Qualifications

• Experience in functional verification and performance verification.
• Strong analytical and problem-solving skills.
• Ability to collaborate with teams across different time zones.

Responsibilities

• Develop/Maintain tests for functional and performance verification.
• Build testbench components for next generation IP.
• Improve test libraries for IP level testing.
• Create hardware emulation builds for verification.
• Maintain/improve hardware emulation environment.
• Provide technical support to teams.

Skills

Verilog/SystemVerilog

UVM

Perl

Python

Education

Bachelors or Masters in Computer Engineering/Electrical Engineering

Job description

We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES

• Develop/Maintain tests for functional verification and performance verification at the core level.
• Build testbench components to support the next generation IP.
• Maintain or improve current test libraries to support IP level testing.
• Create hardware emulation build to verify the IP functional performance.
• Maintain and improve current hardware emulation environment to speed up the runtime performance and improve the debug facility.
• Provide technical support to other teams.

PREFERRED EXPERIENCE

• Good at Verilog/SystemVerilog and UVM.
• Experience/Background on SerDes is a benefit.
• Experience with Perl/Python programming is a benefit.

ACADEMIC CREDENTIALS

• Bachelors or Masters degree in Computer Engineering/Electrical Engineering.