Design Verification Manager

OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD.; Singapore; On-site; SGD 100,000 - 130,000; Full time

Job summary

A leading semiconductor company in Singapore is seeking a Design Verification Manager to lead a verification team and develop advanced methodologies for complex designs. The ideal candidate will have a strong background in SoC design principles, experience with UVM verification, and excellent team leadership skills. This role requires a minimum of 10 years of relevant experience and a MSEE/BSEE degree. Join us to push the limits in verification excellence.

Qualifications

• Minimum 10 years of relevant experience in semiconductor industry.
• Experience in RTL design is a plus.
• Experience in video processing and analytics is a plus.

Responsibilities

• Lead a passionate verification team pushing limits.
• Develop and deploy advanced verification methodologies.
• Conduct thorough test plan reviews and execute on time.
• Achieve zero defects in large verification space.

Skills

SoC design principles

Test plan development

EDA tools and flows

UVM verification methodology

C/C++ programming

Scripting languages (Python, Perl)

Team leadership

Communication skills

Education

MSEE/BSEE in Electrical Engineering or Computer Engineering

Job description

As a Design Verification Manager, you are expected to carry out the following responsibilities.

• Be in-charge of a passionate verification team that is constantly pushing the limits
• Developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification.
• Conduct thorough test plan reviews systematically and execute the plan on-time with high quality.
• Achieve zero-defect, with the best and smartest approach to the large verification space.

Requirements

• Strong knowledge of SoC design principles, including IP block integration and system-level verification
• Experience with test plan development, execution, and analysis
• Familiarity with EDA tools and development flows for ASIC verification
• Highly disciplined, quality-minded, and highly driven for excellence.
• Excellent team leader and good communication skills.
• Strong expertise in UVM verification methodology.
• Experience in C and/or a scripting language such as python or perl.
• MSEE/BSEE in Electrical Engineering or Computer Engineering, with at least 10 years of relevant experience.
• Experience in RTL design is a plus.
• Experience in video processing and video analytics is a plus.
• Passionate and strong in general programming is a plus.