CPU RTL Design Engineer (Staff level) - Cambridge, UK

Qualcomm; Cambridge; On-site; GBP 60,000 - 80,000; Full time

Job summary

A leading technology company in Cambridge is seeking a CPU Micro-architecture and RTL Design Engineer to contribute to CPU RTL development for high performance, low power devices. Candidates should possess strong microprocessor architecture knowledge, programming skills in Verilog/VHDL, and experience in ASIC design. This full-time position requires on-site work. The company provides competitive compensation, including salary, stock, and various benefits.

Benefits

Salary, stock and performance related bonus

Maternity/Paternity Leave

Employee stock purchase scheme

Matching pension scheme

Education Assistance

Relocation and immigration support

Life, Medical, Income and Travel Insurance

Subsidised gym membership

Bicycle purchase scheme

Qualifications

• Bachelor's degree in a relevant field and 4+ years of ASIC design experience.
• Master's degree in a relevant field and 3+ years of ASIC design experience.
• PhD in a relevant field and 2+ years of ASIC design experience.

Responsibilities

• Explore high performance strategies with the CPU modelling team.
• Develop microarchitecture specifications from architectural exploration.
• Own RTL design and ensure it meets performance goals.
• Support functional and performance verification teams.
• Collaborate with engineering teams on physical design.

Skills

Microprocessor architecture knowledge

Verilog and/or VHDL knowledge

Logic design principles understanding

Low power microarchitecture techniques

High performance techniques understanding

Scripting languages (Perl/Python)

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Simulators and waveform debugging tools

Job description

Company: Qualcomm Technologies International Ltd

Job Area: Engineering Group, Engineering Group > ASICS Engineering

General Summary:

About Us

Cambridge is Qualcomm's largest office in the UK, with about 400 team members including engineers, business strategists and support staff. From an engineering perspective, we have teams focussing on: RF and PMU analog design, digital design & verification, digital physical design, embedded software, packaging and post-silicon validation. Target products include: high performance CPUs and GPUs, ultra-low power IoT devices, and wearables such as smart glasses, smart watches and earbuds.

About the Role

We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro‑architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro‑architecture, and also help with architecture/product definition through early involvement in the product life‑cycle.

Please note this role will require 5 days per week onsite in our Cambridge office

What will you be doing?

• Performance exploration. Explore high performance strategies working with the CPU modelling team.
• Microarchitecture development and specification. From early high‑level architectural exploration, through micro architectural research and arriving at a detailed specification.
• RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
• Functional verification support. Help the design verification team execute on the functional verification strategy.
• Performance verification support. Help verify that the RTL design meets the performance goals.
• Design delivery. Work with multi‑functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power.

What are we looking for?

• Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out‑of‑order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems
• Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools
• Knowledge of logic design principles along with timing and power implications
• Understanding of low power microarchitecture techniques
• Understanding of high performance techniques and trade‑offs in a CPU microarchitecture
• Experience using a scripting language such as Perl or Python

What's on Offer

Apart from working in an open, relaxed and collaborative space, you will enjoy:

• Salary, stock and performance related bonus
• Maternity/Paternity Leave
• Employee stock purchase scheme
• Matching pension scheme
• Education Assistance
• Relocation and immigration support
• Life, Medical, Income and Travel Insurance
• Subsidised gym membership
• Bicycle purchase scheme

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

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