Sr Principal Application Engineer - Synthesis / STA / DFT

Cadence Design Systems; Toronto; On-site; CAD 100,000 - 130,000; Full time

Job summary

A leading EDA company in Toronto is seeking a Solutions Engineer with over 10 years of experience in design and EDA. The candidate should have strong ASIC design implementation skills and experience with various synthesis tools. This role involves leading technical discussions and providing customer support in the Signoff solution space. Excellent analytical and presentation skills are essential, along with a proactive approach to problem-solving.

Qualifications

• 10+ years of industry-related experience in design and EDA.
• Strong analytical skills covering digital implementation.
• Excellent customer interaction and presentation skills.

Responsibilities

• Serve as primary contact for technical issues.
• Lead technical discussions with customers.
• Review and resolve project technical issues.

Skills

ASIC design implementation

Synthesis tools experience

Test product knowledge

STA and SDC debugging

Low power analysis

RTL writing skills

Education

BS or MS in Electrical Engineering

Tools

Genus

RTL Compiler

Design Compiler

Modus

Encounter Test

Logic Vision

DFT Compiler

Perl

Tcl

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Responsibilities

• Primary focal point for technical issues, questions, and discussions for a given project.
• Lead technical discussions with customers and act as the primary technical interface with the Cadence PM.
• Influence outcomes among customers, R&D, and Cadence technical team members.
• Mentor other designers regarding technical topics for a given project.
• Deliver results with minimal day-to-day guidance.
• Review, document, and resolve project technical issues; escalate to Project Management when appropriate.
• Understand Cadence semi-custom IC tools; experience with competitive tools is beneficial.
• Guide design reviews and provide final authorization on design issues.
• Identify technical skills to develop and determine when skills are not yet available for a project.
• Assess technical impact of changes, including feasibility and effort estimation for implementation.
• Lead process improvement initiatives for technical projects and provide technical support to PM when developing business cases for process improvements.

We need a pro-active, enthusiastic, customer-facing solutions engineer who is an expert in circuits, design and timing analysis. This person will focus on working with customers in the Signoff solution space.

The ideal candidate should have

1. Understands ASIC design implementation process and steps.
2. Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler).
3. Strong hands-on experience with Test products (Modus, Encounter Test, Logic Vision, DFT Compiler, etc.).
4. Strong STA and SDC debugging abilities are required.
5. Low power analysis, DFT Clock design/analysis experience a plus.
6. Ability to understand and write RTL (SystemVerilog, Verilog, VHDL).

Requirements

1. Requires a BS or MS in EE with 10+ years of industry-related experience in design and EDA ( Digital Implementation/Signoff ).
2. Experience using Digital software with at least one major EDA vendor flow. Automation skills using Perl, Tcl and shell scripting are essential.
3. Strong analytical skills covering digital implementation are critical.
4. Proven track record and experience working in a fast-paced environment.
5. Excellent customer interaction and presentation skills.

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