RTL Engineer for Physical AI SoC - High-Impact Role

Velaura AI, Inc.; Santa Clara (CA); On-site; USD 150,000 - 250,000; Full time

Job summary

Velaura AI, Inc. is seeking talented RTL engineers to help build the next-generation Physical AI SoC.

You will own substantial portions of the design and collaborate with architects, software, and verification teams to translate innovative concepts into production silicon. We welcome engineers at all experience levels who are passionate about building great hardware and solving challenging technical problems.

Qualifications

• Experience designing RTL for complex digital systems.
• Strong understanding of computer architecture and digital design.
• Experience with Verilog/SystemVerilog and RTL design methodologies.
• Familiarity with memory systems, interconnects, DMA engines, or accelerator architectures.
• Experience with hardware/software co-design and system-level performance optimization.
• Strong debugging and problem-solving skills.
• Ability to work effectively in a collaborative, multidisciplinary engineering environment.

Responsibilities

• Design, implement, and optimize RTL for key portions of the Velaura SoC.
• Collaborate with architects to develop robust and efficient microarchitectures.
• Participate in hardware/software co-design discussions spanning AI workloads, memory systems, runtime software, and system architecture.
• Work with software teams to define hardware interfaces, execution flows, memory hierarchies, and performance-critical interactions.
• Contribute to compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, power-management logic, and other core SoC infrastructure.
• Optimize designs for performance, power, area, scalability, and reliability.
• Partner closely with verification and physical design teams throughout the development cycle.
• Analyze performance bottlenecks and propose architectural and implementation improvements.
• Leverage modern engineering tools, including AI-assisted development workflows, to improve productivity, quality, and design exploration.
• Participate in design reviews and contribute to a culture of technical excellence.

Skills

RTL design

Computer architecture

Verilog/SystemVerilog

Performance optimization

Debugging

Collaborative work

Tools

FPGA prototyping

Emulation

AI-assisted workflows

Performance modeling

Job description

Velaura AI, Inc. is seeking talented RTL engineers to help build the next-generation Physical AI SoC.

You will own substantial portions of the design and collaborate with architects, software, and verification teams to translate innovative concepts into production silicon. We welcome engineers at all experience levels who are passionate about building great hardware and solving challenging technical problems.