SoC Verification Engineer – AI & Real-Time Compute

Velaura AI, Inc.; Santa Clara (CA); On-site; USD 150,000 - 250,000; Full time

Job summary

Velaura AI, Inc. is seeking Design Verification Engineers to verify its next-generation Physical AI SoC. You will work with architects, RTL and software teams to ensure correctness, performance, and safety across the platform.

The role welcomes engineers at all levels who enjoy tackling complex hardware/software challenges. You will develop verification plans, build environments, and drive pre-silicon validation including emulation and FPGA prototyping.

Qualifications

• Experience verifying complex digital systems.
• Strong analytical and problem-solving skills.
• Understanding of computer architecture, microarchitecture, and SoC design fundamentals.
• Experience with SystemVerilog, UVM, C/C++, assertions and coverage-driven verification.
• Familiarity with formal verification techniques and tools.
• Knowledge of memory systems and interconnects.
• Ability to debug complex system-level issues.

Responsibilities

• Develop verification strategies for key portions of the Velaura SoC.
• Build verification environments using SystemVerilog, UVM, C/C++, assertions, formal verification, emulation, and related methodologies.
• Collaborate with architects and RTL engineers to define verification plans and coverage.
• Verify compute engines, memory subsystems, interconnect fabrics, DSPs, and other SoC blocks.
• Perform HW/SW co-verification with firmware, drivers, and OS interactions.
• Verify performance, latency, bandwidth, QoS, and real-time behavior under workloads.
• Develop assertions, checkers, scoreboards, and automated verification infrastructure.
• Contribute to emulation, FPGA prototyping, and pre-silicon software bring-up.

Skills

SystemVerilog

UVM

C/C++

Formal verification

Debugging

Computer architecture

Verification strategy

Tools

Emulation

FPGA prototyping

AI-assisted verification

Job description

Velaura AI, Inc. is seeking Design Verification Engineers to verify its next-generation Physical AI SoC. You will work with architects, RTL and software teams to ensure correctness, performance, and safety across the platform.

The role welcomes engineers at all levels who enjoy tackling complex hardware/software challenges. You will develop verification plans, build environments, and drive pre-silicon validation including emulation and FPGA prototyping.