Senior RTL Architect for Physical AI SoC

Velaura AI, Inc.; Santa Clara (CA); On-site; USD 200,000 - 300,000; Full time

Job summary

Velaura AI, Inc. is seeking a Senior RTL Engineer to help build our next-generation Physical AI SoC. You will own significant blocks of RTL, drive microarchitectural decisions, and collaborate with architects, software and verification teams to deliver high-performance hardware.

You will work on memory systems, interconnects, DMA engines, power-management, and participate in design reviews, mentoring junior engineers and utilizing AI-assisted workflows to accelerate development.

Qualifications

• 8+ years designing RTL for complex digital systems with ownership of blocks through tapeout.
• Strong understanding of computer architecture, microarchitecture, and digital design fundamentals.
• Expert-level Verilog/SystemVerilog and modern RTL design methodologies (lint, CDC, synthesis-aware coding, low-power intent).
• Strong grasp of performance, power, and area tradeoffs with data-driven microarchitecture decisions.

Responsibilities

• Own the design, implementation, and optimization of RTL for key portions of the Velaura SoC.
• Collaborate with architects to develop robust microarchitectures and drive decisions within your ownership area.
• Participate in hardware/software co-design discussions spanning AI workloads, memory systems, runtime software, and system architecture.
• Define hardware interfaces, execution flows, memory hierarchies, and performance-critical interactions with software teams.
• Contribute to compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and power-management logic.
• Optimize designs for performance, power, area, scalability, and reliability.
• Mentor junior engineers on design methodology and microarchitecture; lead design reviews.

Skills

RTL design ownership

Verilog/SystemVerilog

microarchitecture

memory interconnects

hardware/software co-design

debugging

leadership in cross-disciplinary teams

Job description

Velaura AI, Inc. is seeking a Senior RTL Engineer to help build our next-generation Physical AI SoC. You will own significant blocks of RTL, drive microarchitectural decisions, and collaborate with architects, software and verification teams to deliver high-performance hardware.

You will work on memory systems, interconnects, DMA engines, power-management, and participate in design reviews, mentoring junior engineers and utilizing AI-assisted workflows to accelerate development.