Remote Senior ASIC Packaging SI/PI Design Lead

Ladders

United States

A distancia

USD 187.000 - 268.000

Jornada completa

Hace 4 días
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Ventajas ofrecidas por este puesto de trabajo

Medical, dental, and vision insurance
401(k) plan with matching contributors
Paid parental leave and short-term/lt>

Descripción de la vacante

Ladders is seeking a Hardware ASIC Packaging SI/PI Simulation and Design Lead to guide signal and power integrity efforts for advanced ASIC packaging in a high-performance, high-volume hardware environment. You will partner with layout, architecture, and vendor teams to develop robust design rules and resolve complex technical issues.

This remote US-based role emphasizes mentoring engineers and driving continuous improvement across the organization, with compensation in the range of $186,900 to

Formación

  • Bachelor's degree in Electrical Engineering with 8+ years' experience in SI/PI
  • Experience with 56G PAM4 SerDes architectures
  • Proficiency in Cadence Sigrity and Ansys HFSS for SI/PI simulations
  • Layout reviews and physical validation with Cadence APD and Ansys EM
  • SPICE-based circuit analysis and performance validation

Responsabilidades

  • Develop and implement design rules for ultra-high-speed signaling to meet power and performance goals
  • Analyze substrate signal and power integrity, collaborating with layout teams for optimal solutions
  • Design and document ASIC packages for high-volume release, including post-layout extraction
  • Collaborate with system partners and vendors to resolve complex technical issues using advanced design rules
  • Define processes and tools for complex ASIC/package developments
  • Lead discussions on chip architecture and design of high-performance ASICs
  • Mentor junior engineers and promote a culture of continuous improvement across engineering teams

Conocimientos

Signal integrity
Power integrity
High-speed design
Leadership
Mentoring
Team collaboration

Educación

Bachelor's degree in Electrical Engineering
Master's degree
PhD

Herramientas

Cadence Sigrity
Ansys HFSS
Cadence APD
Ansys EM
SPICE

Descripción del empleo

Ladders is seeking a Hardware ASIC Packaging SI/PI Simulation and Design Lead to guide signal and power integrity efforts for advanced ASIC packaging in a high-performance, high-volume hardware environment. You will partner with layout, architecture, and vendor teams to develop robust design rules and resolve complex technical issues.

This remote US-based role emphasizes mentoring engineers and driving continuous improvement across the organization, with compensation in the range of $186,900 to

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